CAT660_07 Datasheet, PDF (2/16 Pages) Catalyst Semiconductor – 100mA CMOS Charge Pump Inverter/Doubler

CAT660
PIN CONFIGURATION
SOIC 8-Lead (V)
PDIP 8-Lead (L)
BOOST/FC 1
CAP+ 2
GND 3
CAP- 4
CAT
660
8 V+
7 OSC
6 LV
5 OUT
(Top View)
PIN DESCRIPTIONS
Circuit Configuration
Pin Number Name
1
Boost/FC
Inverter Mode
Frequency Control for the internal oscilla-
tor. With an external oscillator BOOST/FC
has no effect.
Boost/FC Oscillator Frequency
Doubler Mode
Same as inverter.
Oscillator Frequency
Open
10kHz typical, 5kHz minimum 10kHz typical
V+
80kHz typical, 40kHz minimum ^{80kHz typical, 40kHz minimum}
2
CAP+ Charge pump capacitor. Positive terminal. Same as inverter.
3
GND Power supply ground.
Power supply. Positive voltage input.
4
CAP- Charge pump capacitor. Negative terminal. Same as inverter.
5
OUT Output for negative voltage.
Power supply ground.
6
LV
Low-Voltage selection pin. When the input LV must be tied to OUT for all input
voltage is less than 3V, connect LV to GND. voltages.
For input voltages above 3V, LV may be
connected to GND or left open. If OSC is
driven externally, connect LV to GND.
7
OSC ^{Oscillator control input. An external capacitor Same as inverter. Do not overdrive}
can be connected to lower the oscillator OSC in doubling mode. Standard logic
frequency. An external oscillator can drive levels will not be suitable. See the
OSC and set the chip operating frequency. applications section for additional
The charge-pump frequency is one-half the information.
frequency at OSC.
8
V+ Power supply. Positive voltage input.
Positive voltage output.
ORDERING INFORMATION
Part Number
Package
CAT660ELA
CAT660EVA
CAT660EVA-T3
PDIP, 8-lead
SOIC
SOIC
Note: All packages are RoHS compliant.
Quanity
50/tube
100/tube
3,000/reel
Package
Marking
660ELA
660EVA
660EVA
Doc. No. MD-5000, Rev. W
2