CAT1024_07 Datasheet, PDF (11/20 Pages) Catalyst Semiconductor – Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset

CAT1024, CAT1025
Page Write
The CAT1024/25 writes up to 16 bytes of data in a
single write cycle, using the Page Write operation. The
page write operation is initiated in the same manner as
the byte write operation, however instead of
terminating after the initial byte is transmitted, the
Master is allowed to send up to 15 additional bytes.
After each byte has been transmitted, the CAT1024/25
will respond with an acknowledge and internally
increment the lower order address bits by one. The
high order bits remain unchanged.
If the Master transmits more than 16 bytes before
sending the STOP condition, the address counter
‘wraps around,’ and previously transmitted data will be
overwritten.
When all 16 bytes are received, and the STOP condition
has been sent by the Master, the internal programming
cycle begins. At this point, all received data is written to
the CAT1024/25 in a single write cycle.
Figure 8. Byte Write Timing
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SDA LINE S
SLAVE
ADDRESS
BYTE
ADDRESS
S
T
DATA
O
P
P
A
A
A
C
C
C
K
K
K
Figure 9: Page Write Timing
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SDA LINE S
SLAVE
ADDRESS
BYTE
ADDRESS (n)
A
A
C
C
K
K
DATA n
DATA n+1
A
A
C
C
K
K
S
T
DATA n+15 ^O
P
P
A
C
K
© 2007 Catalyst Semiconductor, Inc.
11
Characteristics subject to change without notice
Doc. No. 3008 Rev. N