CAT28LV256_04 Datasheet, PDF (1/12 Pages) Catalyst Semiconductor – 256K-Bit CMOS PARALLEL E2PROM

CAT28LV256
256K-Bit CMOS PARALLEL E²PROM
FEATURES
s 3.0V to 3.6V Supply
s Read Access Times: 200/250/300 ns
s Low Power CMOS Dissipation:
– Active: 15 mA Max.
– Standby: 150 µA Max.
s Simple Write Operation:
– On-Chip Address and Data Latches
– Self-Timed Write Cycle with Auto-Clear
s Fast Write Cycle Time:
– 10ms Max.
s Commercial, Industrial and Automotive
Temperature Ranges
ALOGEN ^FR
LEA _{D F REETM}
s CMOS and TTL Compatible I/O
s Automatic Page Write Operation:
– 1 to 64 Bytes in 10ms
– Page Load Timer
s End of Write Detection:
– Toggle Bit
– DATA Polling
s Hardware and Software Write Protection
s 100,000 Program/Erase Cycles
s 100 Year Data Retention
DESCRIPTION
The CAT28LV256 is a fast, low power, low voltage
CMOS Parallel E²PROM organized as 32K x 8-bits. It
requires a simple interface for in-system programming.
On-chip address and data latches, self-timed write cycle
with auto-clear and V_CC power up/down write protection
eliminate additional timing and protection hardware.
DATA Polling and Toggle status bits signal the start and
end of the self-timed write cycle. Additionally, the
CAT28LV256 features hardware and software write
protection.
BLOCK DIAGRAM
The CAT28LV256 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC–
approved 28-pin DIP, 28-pin TSOP or 32-pin PLCC
packages.
A6–A14
VCC
CE
OE
WE
A0–A5
ADDR. BUFFER
& LATCHES
INADVERTENT
WRITE
PROTECTION
CONTROL
LOGIC
TIMER
ADDR. BUFFER
& LATCHES
ROW
DECODER
HIGH VOLTAGE
GENERATOR
DATA POLLING
AND
TOGGLE BIT
COLUMN
DECODER
32,768 x 8
E²PROM
ARRAY
64 BYTE PAGE
REGISTER
I/O BUFFERS
I/O0–I/O7
28LV256 F01
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1071, Rev. B