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S111-0320XYZ-BB Datasheet, PDF (8/9 Pages) C&D Technologies – DC/DC Converter 3.3V input, 0.8 to 2.5V output, 10A; 5V input, 1.0 to 3.3V output, 10A
DC/DDCC/DCCoCnovnevretreterr
Programmable, Single Output, 1.1V - 1.85Vout @ 60A
3.3V input, 0.8 to 2.5V output, 10A; 5V input, 1.0 to 3.3V output, 10A
External Capacitance for SIP Products
All SIP products require external capacitance to be placed on the system board that the SIP will
be designed into. This application note is an attempt to explain how to translate datasheet
information and apply it to a system level board design.
Input Capacitance
Although input capacitance value is not critical, the input capacitors must be capable of storing
fairly large amounts of energy. This means, for example, small ceramic capacitors would be
inappropriate. The primary criteria, though, for choosing the input capacitors is AC ripple
current rating. The SIP datasheet contains a chart showing ripple current vs. output current (or
output power). The system designer determines the maximum SIP output current required from
the SIP. Based on that number, the chart will show a corresponding ripple current rating the
designer needs to plan for when choosing input capacitors.
Example using SIP S111-03 for 1.2 V output:
The designer knows the S111 output current will be maximum 8 A in his application.
The ripple current chart (3.3V input) shows a 5 A rating required for the input capacitor.
Also known is that the capacitor the designer hopes to use has a ripple current rating of
3A. Therefore, the designer must use two of the chosen capacitors in parallel for a total
ripple current capability of 6A. This will adequately cover the 5 A need.
Output Capacitance
The only requirement for capacitance value is for basic circuit stability of the SIP. That value is
specified on the SIP datasheet— usually 150µF. The other consideration for the output
capacitor is the total ESR (Equivalent Series Resistance). As with ripple current, every
capacitor has a specified ESR. W hen using multiple capacitors in parallel, this ESR is added
exactly like parallel resistors. Therefore, more capacitors mean less ESR. The SIP datasheet
specifies a maximum total ESR necessary for optimum SIP performance. The designer may
also choose to add more capacitance to reduce output ripple and noise.
Exam ple:
The datasheet specifies a maximum ESR of 100mΩ for output capacitance. The system
designer wants to use a capacitor with a specified ESR of 130mΩ. Since 130mΩ is
more than the needed 100mΩ, two capacitors must be used in parallel for a total
effective ESR of 65mΩ.
Generally, good, low ESR bulk capacitors are recommended for both input and output
capacitance so that fewer capacitors are needed since board real estate is usually an important
factor in today's designs.
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S111_084-S111-00_RevG_Jan18-2005.fm
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