CAT24FC17 Datasheet, PDF (3/10 Pages) Catalyst Semiconductor – 16-kb I2C Serial EEPROM

CAT24FC17
A.C. CHARACTERISTICS
V_CC = 2.5 V to 5.5 V, unless otherwise specified.
Read & Write Cycle Limits
Symbol
Parameter
F_SCL
T_I(1)
t_AA
t_BUF(1)
t_HD:STA
t_LOW
t_HIGH
t_SU:STA
t_HD:DAT
t_SU:DAT
t_R(1)
t_F(1)
t_SU:STO
t_DH
Clock Frequenc
Noise Suppression Time Constant at SCL, SDA Inputs
SCL Low to SDA Data Out and ACK Out
Time the Bus Must be Free Before a New Transmission
Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
2.5 V - 5.5 V
Min
Max
400
100
900
1300
600
1300
600
600
0
100
300
300
600
100
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Power-Up Timing⁽¹⁾⁽²⁾
Symbol
Parameter
t_PUR
t_PUW
Power-up to Read Operation
Power-up to Write Operation
Min
Typ
Max
1
1
Units
ms
ms
Write Cycle Limits
Symbol
Parameter
tWR
Write Cycle Time
Min
Typ
Max
5
Units
ms
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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Doc No. 1077, Rev. F