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| PACGTL Datasheet, PDF (3/3 Pages) California Micro Devices Corp – HIGH PERFORMANCE GTL TERMINATION NETWORK FOR SOCKET 370 PROCESSORS | |||
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CALIFORNIA MICRO DEVICES
PACGTL
RECOMMENDED LAYOUT FOR SOCKET 370 (OPTION B)
FOR CELERONÂ AND MENDOCINOÂ CPUs
Note: This option requires 2 metal layers in board routing for all 119 GTL termination lines. Please note that the second layer only
uses 6 short traces, minimizing potencial interference with other traces, and also minimizing the number of vias.
©2000 California Micro Devices Corp. All rights reserved.
2/00
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
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