CM1233 Datasheet, PDF (3/10 Pages) California Micro Devices Corp – PicoGuard XSTM eXtreme Speed ESD Clamp Array For High Speed Data Line Protection

CM1233
The PicoGuard XS Architecture Advantages
Figure 2 illustrates a standard ESD protection device.
The inductor element represents the parasitic
inductance arising from the bond wire and the PCB
trace leading to the ESD protection diodes.
Connector
ASIC
Bond Wire
Inductance
ESD
Stage
Figure 2. Standard ESD Protection Model
Figure 3 illustrates one of the channels. Similarly, the
inductor elements represent the parasitic inductance
arising from the bond wire and PCB traces leading to
the ESD protection diodes as well.
Connector
L1
50Ω
L2
ESD
Device
ASIC
Figure 3. CM1233 PicoGuard XS ESD Protection
Model
CM1233 Inductor Elements
In the CM1233 PicoGuard XS architecture, the
inductor elements and ESD protection diodes interact
differently compared to the standard ESD model.
In the standard ESD protection device model, the
inductive element presents high impedance against
high slew rate strike voltage, i.e. during an ESD strike.
The impedance increases the resistance of the
conduction path leading to the ESD protection
element. This limits the speed that the ESD pulse can
discharge through the ESD protection element.
In the PicoGuard XS architecture, the inductive
elements are in series to the conduction path leading
to the protected device. The elements actually help to
limit the current and voltage striking the protected
device.
First the reactance of the inductive element, L1, on the
connector side when an ESD strike occurs, acts in the
opposite direction of the ESD striking current. This
helps limit the peak striking voltage. Then the
reactance of the inductive element, L2, on the ASIC
side forces this limited ESD strike current to be
shunted through the ESD protection diodes. At the
same time, the voltage drop across both series
element acts to lower the clamping voltage at the
protected device terminal.
Through this arrangement, the inductive elements also
tune the impedance of the ESD protection element by
cancelling the capacitive load presented by the ESD
diodes to the signal line. This improves the signal
integrity and makes the overall ESD protection device
more transparent to the high bandwidth data signals
passing through the channel.
The innovative PicoGuard XS architecture turns the
disadvantages of the parasitic inductive elements into
useful components that help to limit the ESD current
strike to the protected device and also improves the
signal integrity of the system by balancing the
capacitive loading effects of the ESD diodes. At the
same time, this architecture provides an impedance
matched signal path for 50Ω loading applications.
Board designs can take advantage of precision internal
component matching for improved signal integrity,
which is not otherwise possible with discrete
components at the system level. This helps to simplify
the PCB layout considerations by the system designer
and eliminates the associated passive components for
load matching that is normally required with standard
ESD protection circuits.
Each ESD channel consists of a pair of diodes in
series which steer the positive or negative ESD current
pulse to either the Zener diode or to ground. This
embedded Zener diode also serves to eliminate the
need for a separate bypass capacitor to absorb
positive ESD strikes to ground. The CM1233 protects
against ESD pulses up to ±8kV contact per the IEC
61000-4-2 standard.
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Issue A – 03/18/08