BUF08800 Datasheet, PDF (8/23 Pages) Burr-Brown (TI) – Programmable Reference Generator and 400mA VCOM Driver

BUF08800
SBOS380A − FEBRUARY 2007 − REVISED MAY 2007
OUTPUT VOLTAGE
Buffer output values are determined by the supply voltage
and the decimal value of the binary input code used to
program that buffer. The value is calculated using
Equation 1:
ǒ Ǔ V_OUT +
V_S
1024
Decimal Value of Code
(1)
The BUF08800 outputs 2−8 are capable of a full-scale
voltage output change in typically 4µs—no intermediate
steps are required. Output swing is limited to the voltages
specified in the Electrical Characteristics table. V_COM
(OUT 1) through OUT 4 can swing from 1V to V_S − 0.2V;
OUT 5 through OUT 8 can swing between 0.25V and V_S
− 1V.
READ/WRITE OPERATIONS
The BUF08800 is able to read from a single DAC or
multiple DACs, or write to the register of a single DAC, or
multiple DACs in a single communication transaction. See
the timing diagrams; Figure 11 through Figure 14. DAC
addresses begin with 0000, which correspond to V_COM
(OUT 1), through 0111, which correspond to DAC_8; this
address archetecture is shown in Table 3. Write
commands are performed by setting the read/write bit
LOW. Setting the read/write bit HIGH performs a read
transaction.
Table 3. Quick-Reference Table of DAC
Addresses
DAC
ADDRESS
V_COM OUT 1
DAC 2
0000 0000
0000 0001
DAC 3
DAC 4
DAC 5
0000 0010
0000 0011
0000 0100
DAC 6
DAC 7
DAC 8
0000 0101
0000 0110
0000 0111
Writing
To write to a single DAC register:
1. Send a START condition on the bus.
2. Send the device address and read/write bit = LOW.
The BUF08800 acknowledges this byte.
3. Send a DAC address byte. Bits D7−D3 are unused
and must be set to 0. Bits D2−D0 are the DAC
address. Only DAC addresses 0000 to 0111 are valid
and will be acknowledged.
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4. Send two bytes of data for the specified DAC. Begin
by sending the most significant byte first (bits
D15−D8, of which only bits D9 and D8 are used),
followed by the least significant byte (bits D7−D0).
The DAC register is updated after receiving the
second byte.
5. Send a STOP condition on the bus.
The BUF08800 acknowledges each data byte. If the
master terminates communication early by sending a
STOP or START condition on the bus, the specified
register will not be updated. Updating the DAC register is
not the same as updating the DAC output voltage. See the
Output Latch section.
The process of updating multiple registers begins the
same as when updating a single register. However,
instead of sending a STOP condition after writing the
addressed register, the master continues to send data for
the next register. The BUF08800 automatically and
sequentially steps through subsequent registers as
additional data are sent. The process continues until all
desired registers have been updated or a STOP condition
is sent.
To write to multiple registers:
1. Send a START condition on the bus.
2. Send the device address and read/write bit = LOW.
The BUF08800 acknowledges this byte.
3. Send either the V_COM (OUT 1) address byte to start at
the first DAC (V_COM OUT 1) or send the address of
whichever DAC is the first to be updated. The
BUF08800 begins with this DAC and steps through
subsequent DACs in sequential order.
4. Send the bytes of data. The first two bytes are for the
DAC addressed in step 3. Its register is automatically
updated after receiving the second byte. The next two
bytes are for the following DAC. The DAC register is
updated after receiving the fourth byte. The last two
bytes are for DAC_8. The DAC register is updated
after receiving the 24th byte. For each DAC, begin by
sending the most significant byte (bits D15−D8, of
which only bits D9 and D8 have meaning), followed by
the least significant byte (bits D7−D0).
5. Send a STOP condition on the bus.
The BUF08800 acknowledges each byte. To terminate
communication, send a STOP or START condition on the
bus. Only DACs that have received both bytes will be
updated.
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