DAC8822_07 Datasheet, PDF (7/24 Pages) Burr-Brown (TI) – 16-Bit, Dual, Parallel Input, Multiplying Digital-to-Analog Converter

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A1
0
0
1
1
DAC8822
SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
Table 2. Address Decoder Pins
A0
OUTPUT UPDATE
0
DAC A
1
None
0
DAC A and DAC B
1
DAC B
CONTROL INPUTS
RS
WR
LDAC
0
X
X
1
0
0
1
1
1
1
0
1
1
1
1
0
Table 3. Function of Control Inputs
REGISTER OPERATION
Asynchronous operation. Reset the input and DAC register to '0' when the RSTSEL pin is tied to DGND, and to
midscale when RSTSEL is tied to V_DD.
Load the input register with all 16 data bits.
Load the DAC register with the contents of the input register.
The input and DAC register are transparent.
LDAC and WR are tied together and programmed as a pulse. The 16 data bits are loaded into the input register on
the falling edge of the pulse and then loaded into the DAC register on the rising edge of the pulse.
No register operation.
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