CS4225 Datasheet, PDF (7/30 Pages) Cirrus Logic – Digital Audio Conversion System

CS4225
SWITCHING CHARACTERISTICS - CONTROL PORT
(TA = 25^oC; VD+, VA+ = 5V±10%;Inputs: logic 0 = DGND, logic 1 = VD+, CL = 20pF)
Parameter
Symbol
Min
Max
I²C^® Mode (H/S = floating)
Note 10
SCL Clock Frequency
fscl
0
100
Bus Free Time Between Transmissions
tbuf
4.7
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
Clock Low Time
tlow
4.7
Clock High Time
thigh
4.0
Setup Time for Repeated Start Condition
tsust
4.7
SDA Hold Time from SCL Falling
Note 11
thdd
0
SDA Setup Time to SCL Rising
tsud
250
Rise Time of Both SDA and SCL Lines
tr
1
Fall Time of Both SDA and SCL Lines
tf
300
Setup Time for Stop Condition
tsusp
4.7
Notes: 10. Use of the I²C^® bus interface requires a license from Philips.
I²C^® is a registered trademark of Philips Semiconductors.
11. Data must be held for sufficient time to bridge the 300ns transition time of SCL.
Units
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
Stop Start
SDA
t _buf
t _hdst
t _high
SCL
t _low
t _hdd
Repeated
Start
t _hdst
t_f
t _sud
t _sust
tr
Stop
t _susp
DS86PP8
7