MSC1212Y2 Datasheet, PDF (50/69 Pages) Burr-Brown (TI) – Precision Analog-to-Digital Converter (ADC)

Port 3 Data Direction High Register (P3DDRH)
7
6
5
4
3
SFR B4_H
P37H
P37L
P36H
P36L
P35H
P3.7
bits 7-6
Port 3 bit 7 control.
P37H
P37L
0
0
Standard 8051
0
1
CMOS Output
1
0
Open Drain Output
1
1
Input
NOTE: Port 3.7 also controlled by EA and Memory Access Control HCR1.1.
P3.6
bits 5-4
Port 3 bit 6 control.
P36H
P36L
0
0
Standard 8051
0
1
CMOS Output
1
0
Open Drain Output
1
1
Input
NOTE: Port 3.6 also controlled by EA and Memory Access Control HCR1.1.
P3.5
bits 3-2
Port 3 bit 5 control.
P35H
P35L
0
0
Standard 8051
0
1
CMOS Output
1
0
Open Drain Output
1
1
Input
P3.4
bits 1-0
Port 3 bit 4 control.
P34H
0
0
1
1
P34L
0
1
0
1
Standard 8051
CMOS Output
Open Drain Output
Input
2
P35L
1
P34H
DAC Low Byte (DACL)
7
6
5
4
3
2
1
SFR B5_H
DACL7-0 Least Significant Bit Register for DAC0-3 and DAC Control (0 and 2).
bits 7-0
DAC High Byte (DACH)
7
6
5
4
3
2
1
SFR B6_H
DACH7-0 Most Significant Byte Register for DAC0-3 and DAC Control (1 and 3).
bits 7-0
0
P34L
0
0
Reset Value
00_H
Reset Value
00_H
Reset Value
00_H
DAC Select Register (DACSEL)
SFR B7_H
7
DSEL7
6
DSEL6
5
DSEL5
4
DSEL4
3
DSEL3
2
DSEL2
1
DSEL1
0
DSEL0
Reset Value
00_H
DSEL7-0
bits 7-0
DAC and DAC Control Select. The DACSEL register selects which DAC output register or which DAC control
register is accessed by the DACL and DACH registers.
DACSEL (B7_H)
00_H
01_H
02_H
03_H
04_H
05_H
06_H
07_H
DACH (B6H)
DAC0 (high)
DAC1 (high)
DAC2 (high)
DAC3 (high)
DACCON1
DACCON3
—
—
DACL (B5H)
DAC0 (low)
DAC1 (low)
DAC2 (low)
DAC3 (low)
DACCON0
DACCON2
LOADCON
—
RESET VALUE
0000_H
0000_H
0000_H
0000_H
6363_H
0303_H
--00_H
—
50
MSC1212
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SBAS278A