CS5541 Datasheet, PDF (5/26 Pages) Cirrus Logic – Low-power, High-Voltage, 24-Bit Delta-Sigma ADC

CS5541
ANALOG CHARACTERISTICS (Continued)
Parameter
Min
Typ
Analog Inputs
Common Mode + Signal on AIN+ or AIN- (Bipolar/Unipolar Mode)
Single Supply
0.0
-
Dual Supply
VA-
-
CVF Current on AIN+, AIN-
(Note 8) -
12
Input Leakage for MUX when off
-
10
Common Mode Rejection
dc
50, 60Hz
-
120
-
120
Input Capacitance
-
8
Voltage Reference Inputs
Range
(VREF+) - (VREF-)
(Note 10) 0.1
2.5
CVF Current on VREF+ and VREF-
Common Mode Rejection
dc
50, 60 Hz
Input Capacitance
Dynamic Characteristics
Modulator Sampling Frequency
Filter Settling to 1/2 LSB (Full Scale Step)
13.4 SPS OWR
53.7 SPS OWR
64.8 SPS OWR
260 SPS OWR
Power Supplies
DC Power Supply Currents
(Normal Mode)
I_A+
I_D+
Power Consumption
Normal Mode
Standby Mode
Sleep Mode
Power Supply Rejection
dc Positive Supplies
dc Negative Supply
(Note 9) -
-
-
-
-
(Note 11)
-
-
-
20
120
120
12
MCLK/2
1/OWR
4/OWR
1/OWR
4/OWR
-
225
-
25
(Note 12) -
750
-
75
-
30
-
80
-
80
Max
VA+
VA+
-
-
-
-
-
(VA+) -
(VA-)
-
-
-
-
-
-
-
-
-
280
36
1000
-
-
-
-
Units
V
V
nA
pA
dB
dB
pF
V
nA
dB
dB
pF
Hz
s
s
s
s
µA
µA
µW
µW
µW
dB
dB
Notes: 8. See Section 2.1, “Analog Input”.
9. See Section 2.2, “Voltage Reference Input”.
10. VREF must be less than or equal to supply voltages.
11. The CS5541 includes two digital filters. The first filter, which achieves simultaneous rejection of 50/60
Hz, provides single conversion settling at 13.4 SPS throughput or four conversion settling at 53.7 SPS
throughput. The second filter, which achieves 16-bit performance, provides single conversion settling at
64.8 SPS throughput or four conversion settling at 260 SPS throughput.
12. All outputs unloaded. All digital inputs at CMOS levels.
DS500PP1
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