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CS4299-BQ Datasheet, PDF (46/52 Pages) Cirrus Logic – CrystalClear SoundFusion Audio Codec 97
CS4299-BQ
AC-Link
RESET# - AC ’97 Chip Reset, Input, Pin 11
This active low signal is the asynchronous Cold Reset input to the CS4299-BQ. The CS4299-BQ must
be reset before it can enter normal operating mode.
SYNC - AC-Link Serial Port Sync pulse, Input, Pin 10
This signal is the serial port timing signal for the AC-link. Its period is the reciprocal of the maximum
sample rate, 48 kHz. The signal is generated by the controller, synchronous to BIT_CLK. SYNC is an
asynchronous input when the CS4299-BQ is configured as a primary audio codec and is in a PR4
powerdown state. A series terminating resistor of 47 Ω should be connected on the signal near the
SYNC source.
BIT_CLK - AC-Link Serial Port Master Clock, Input/Output, Pin 6
This input/output signal controls the master clock timing for the AC-link. In primary mode, this signal is a
12.288 MHz output clock derived from a 24.576 MHz crystal on the XTL_IN input clock. When the
CS4299-BQ is in secondary mode, this signal is an input which controls the AC-link serial interface and
generates all internal clocking including the AC-link serial interface timing and the analog sampling
clocks. A series terminating resistor of 47 Ω should be connected on this signal close to the CS4299-BQ
in primary mode or close to the BIT_CLK source in secondary mode.
SDATA_OUT - AC-Link Serial Data Input Stream to AC ’97, Input, Pin 5
This input signal receives the control information and digital audio output streams. The data is clocked
into the CS4299-BQ on the falling edge of BIT_CLK. A series terminating resistor of 47 Ω should be
connected on this signal near the controller.
SDATA_IN - AC-Link Serial Data Output Stream from AC ’97, Output, Pin 8
This output signal transmits the status information and digital audio input streams from the ADCs. The
data is clocked out of the CS4299-BQ on the rising edge of BIT_CLK. A series terminating resistor of
47 Ω should be connected on this signal as close to the CS4299-BQ as possible.
Power Supplies
DVdd1, DVdd2 - Digital Supply Voltage, Pins 1 and 9
Digital supply voltage for the AC-link section of the CS4299-BQ. These pins can be tied to +5 V digital
or to +3.3 V digital. The CS4299-BQ and controller AC-link should share a common digital supply
DVss1, DVss2 - Digital Ground, Pins 4 and 7
Digital ground connection for the AC-link section of the CS4299-BQ. These pins should be isolated from
analog ground currents.
AVdd1, AVdd2 - Analog Supply Voltage, Pins 25 and 38
Analog supply voltage for the analog and mixed signal sections of the CS4299-BQ. These pins must be
tied to the analog +5 V power supply. It is strongly recommended that +5 V be generated from a
voltage regulator to ensure proper supply currents and noise immunity from the rest of the system.
AVss1, AVss2 - Analog Ground, Pins 26 and 42
Ground connection for the analog, mixed signal, and substrate sections of the CS4299-BQ. These pins
should be isolated from digital ground currents.
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