CS4299-BQ Datasheet, PDF (45/52 Pages) Cirrus Logic – CrystalClear SoundFusion Audio Codec 97

CS4299-BQ
Analog Reference, Filters, and Configuration
REFFLT - Internal Reference Voltage, Input, Pin 27
This signal is the voltage reference used internal to the CS4299-BQ. A 0.1 µF and a 1.0 µF (must not
be larger than 1 µF) capacitor with short, wide traces must be connected to this pin. No other
connections should be made to this pin.
Vrefout - Voltage Reference, Output, Pin 28
All analog inputs and outputs are centered around Vrefout, nominally 2.3 Volts. This pin may be used to
level shift external circuitry. This pin cannot drive any DC loads, thus any external loading must be
buffered.
AFLT1 - Left ADC Channel Antialiasing Filter, Input, Pin 29
This pin needs a 1000 pF NPO capacitor connected to analog ground.
AFLT2 - Right ADC Channel Antialiasing Filter, Input, Pin 30
This pin needs a 1000 pF NPO capacitor connected to analog ground.
FLTI, FLTO - 3D Filter, Input, Pin 33 and 34
A 1000 pF capacitor must be connected between FLTI and FLTO if the 3D function is used.
FLT3D - 3D Filter, Input, Pin 32
A 0.01 µF capacitor must be connected from this pin to AGND if the 3D function is used.
BCFG - Beep Configuration, Input, Pin 31
This pin is the configuration control for the PC_BEEP bypass path. If this pin is grounded, the bypass
path is disabled. If this pin is left floating, the PC_BEEP bypass path is enabled.
Misc. Digital Interfaces
S/PDIF_OUT - Sony/Philips Digital Interface, Output, Pin 48
This pin generates the S/PDIF digital output from the CS4299-BQ when the SPEN bit in the S/PDIF
Control Register (Index 68h) is ‘set’. This output may be used to directly drive a resistive divider and
coupling transformer to an RCA-type connector for use with consumer audio equipment.
EAPD - External Amplifier Powerdown, Output, Pin 47
This pin is used to control the powerdown state of an audio amplifier external to the CS4299-BQ. The
output is controlled by the EAPD bit in the Powerdown Ctrl/Stat Register (Index 26h). It is driven as a
normal CMOS output and defaults low (‘0’) upon power-up.
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