PCM3060 Datasheet, PDF (38/45 Pages) Burr-Brown (TI) – 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC

PCM3060
SLAS533 – MARCH 2007
B15 B14 B13 B12 B11 B10 B9 B8 B7
B6
Register 73 0
1
0
0
1
0
0
1 RSV RSV
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B5
B4
B3 B2 B1
B0
RSV
ZCDD
BYP DREV MUT12 MUT11
1
ZCDD: Zero-Cross Detection Disable for Digital Attenuation (ADC)
Default value: 0
ZCDD = 0
ZCDD = 1
Zero-cross detection enabled (default)
Zero-cross detection disabled
The ZCDD bit controls the zero-cross detect function for digital attenuation and mute. When zero-cross detection
is enabled, the actual level change for digital attenuation and mute is done at the timing of zero-cross detection
on the input signal which is sampled for every 1/f_S time interval. If zero-crossing is not detected for 512/f_S, the
actual level change is done for every 1/f_S time interval until a zero-crossing is detected again as timeout control
for no zero-crossing input signal. When zero-cross detection is disabled, the actual level change is done at the
timing of 8/f_S time interval.
BYP: HPF Bypass Control (ADC)
Default value: 0
BYP = 0
BYP = 1
Normal output, HPF enabled (default)
Bypassed output, HPF disabled
The BYP bit controls the HPF function; the dc component of the input signal and the internal dc offset are
converted in bypass mode.
DREV1: Input Phase Select (ADC)
Default value: 0
DREV1 = 0
DREV1 = 1
Normal input (default)
Inverted input
The DREV1 bit is used to control the phase of analog signal inputs (V_INL and V_INR).
MUT1x: Soft Mute Control (ADC)
where x = 1 or 2, corresponding to the ADC output L-ch part of DOUT (x = 1) and R-ch part of DOUT (x = 2).
Default value: 0
MUT1x = 0
MUT1x = 1
Mute disabled (default)
Mute enabled
The mute bits, MUT11 and MUT12, are used to enable or disable the soft mute function for the corresponding
ADC outputs, DOUT. The soft mute function is incorporated into the digital attenuators. When mute is disabled
(MUT1x = 0), the attenuator and ADC operate normally. When mute is enabled by setting MUT1x = 1, the digital
attenuator for the corresponding output is decreased from the current setting to infinite attenuation in 0.5 dB step
at the timing of zero-cross detection on the input signal which is sampled for every 1/f_S time interval, or for every
8/f_S time interval if zero-cross detection mode is disabled by ZCDD setting. If a zero-crossing is not detected for
512/f_S, actual level change is done for every 1/f_S time interval until zero-crossing is detected again. By setting
MUT1x = 0, the attenuator is increased to the previously programmed attenuation level in 0.5 dB step in the
same manner as for decreasing. This provides pop-free muting for the ADC input.
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