English
Language : 

CS4362A Datasheet, PDF (33/47 Pages) Cirrus Logic – 114 dB, 192 kHz 6-channel D/A Converter
CS4362A
5.1.5 Power Down (PDN)
Default = 1
0 - Disabled
1 - Enabled
Function:
The entire device will enter a low-power state when this function is enabled, and the contents of the control
registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and must be dis-
abled before normal operation in Control Port mode can occur.
5.2 Mode Control 2 (address 02h)
7
Reserved
0
6
DIF2
0
5
DIF1
0
4
DIF0
0
3
Reserved
0
2
Reserved
0
1
Reserved
0
0
Reserved
0
5.2.1 Digital Interface Format (dif)
Default = 000 - Format 0 (Left Justified, up to 24-bit data)
Function:
These bits select the interface format for the serial audio input. The Functional Mode bits determine wheth-
er PCM or DSD mode is selected.
PCM Mode: The required relationship between the Left/Right clock, serial clock and serial data is defined
by the Digital Interface Format and the options are detailed in Figures 7-12.
DIF2 DIF1 DIF0
DESCRIPTION
Format FIGURE
0
0
0 Left Justified, up to 24-bit data
0
0
1 I2S, up to 24-bit data
0
7
1
8
0
1
0 Right Justified, 16-bit data
2
9
0
1
1 Right Justified, 24-bit data
3
10
1
0
0 Right Justified, 20-bit data
4
11
1
0
1 Right Justified, 18-bit data
5
12
1
1
0 Reserved
-
1
1
1 Reserved
-
Table 5. Digital Interface Formats - PCM Mode
DSD Mode: The relationship between the oversampling ratio of the DSD audio data and the required Mas-
ter clock to DSD data rate is defined by the Digital Interface Format pins.
DIF2
DIF1
DIFO
DESCRIPTION
0
0
0
64x oversampled DSD data with a 4x MCLK to DSD data rate
0
0
1
64x oversampled DSD data with a 6x MCLK to DSD data rate
0
1
0
64x oversampled DSD data with a 8x MCLK to DSD data rate
0
1
1
64x oversampled DSD data with a 12x MCLK to DSD data rate
1
0
0
128x oversampled DSD data with a 2x MCLK to DSD data rate
1
0
1
128x oversampled DSD data with a 3x MCLK to DSD data rate
1
1
0
128x oversampled DSD data with a 4x MCLK to DSD data rate
1
1
1
128x oversampled DSD data with a 6x MCLK to DSD data rate
Table 6. Digital Interface Formats - DSD Mode
DS617PP1
33