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CS4382 Datasheet, PDF (28/42 Pages) Cirrus Logic – 114 dB, 192 kHz 8-Channel D/A Converter
CS4382
5.6 Clock Source Selection
The CS4382 has two serial clock and two left/right
clock inputs. The SDINxCLK bits in the control
port allow the user to set which SCLK/LRCK pair
is used to latch the data for each SDINx pin. The
clocks applied to LRCK1 and LRCK2 must be de-
rived from the same MCLK and must be exact fre-
quency multiples of each other as specified in the
“Switching Characteristics” table on page 8. When
using both SCLK1/LRCK1 and SCLK2/LRCK2, if
either SCLK/LRCK pair loses synchronization
then both SCLK/LRCK pairs will go through a re-
time period where the device is re-evaluating clock
ratios. During the retime period all DAC pairs are
temporarily inactive, outputs are muted, and the
mute control pins will go active according to the
MUTEC register.
If unused, SCLK2 and LRCK2 should be tied static
low and SDINx bits should all be set to
SCLK1/LRCK1.
In stand-alone mode all DAC pairs use SCLK1 and
LRCK1 for timing and SCLK2/LRCK2 should be
tied to ground.
5.7 Using DSD mode
In stand-alone mode, DSD operation is selected by
holding DSD_EN(LRCK1) high and applying the
DSD data and clocks to the appropriate pins. The
M2:0 pins set the expected DSD rate and MCLK
ratio.
In control-port mode the FM bits set the device into
DSD mode (DSD_EN pin is not required to be held
high). The DIF register then controls the expected
DSD rate and MCLK ratio. To access the full range
of DSD clocking modes (other than 64x DSD 4x
MCLK and 128x DSD 2x MCLK) the following
additional register sequence needs to be written:
99h to register 00h
80h to register 1Ah
00h to register 00h
When exiting DSD mode the following additional
sequence needs to be written:
99h to register 00h
00h to register 1Ah
00h to register 00h
During DSD operation, the PCM related pins
should either be tied low or remain active with
clocks (except LRCK1 in Stand-Alone mode).
When the DSD related pins are not being used they
should either be tied static low, or remain active
with clocks (except M3 in Stand-Alone mode).
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