DSD1794 Datasheet, PDF (27/47 Pages) Texas Instruments – 24-BIT, 192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STRRO DIGITAL-TO-ALALOG CONVERTER

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DSD1794
SLES077A − MARCH 2003 − REVISED NOVEMBER 2003
OPE: DAC Operation Control
This bit is available for read and write.
Default value: 0
OPE = 0
OPE = 1
DAC operation enabled (default)
DAC operation disabled
The OPE bit is used to enable or disable the analog output for both channels. Disabling the analog outputs forces
them to the bipolar zero level (BPZ) even if digital audio data is present on the input.
ZOE: Zero Flag Pin Operation Control
This bit is available for read and write.
Default value: 0
ZOE = 0
ZOE = 1
DSD data input (default)
Zero flag output
The ZOE bit is used to change the DSDL (pin 1) and DSDR (pin 2) pin assignments. When the ZOE bit is set to 0,
DSDL and DSDR are inputs for L-channel and R-channel data. When the ZOE bit is set to 1, DSDL and DSDR
become outputs for the L-channel and R-channel zero flags, respectively. See the PCMZ and DZ[1:0] bit descriptions
of register 21.
DFMS: Stereo DF Bypass Mode Select
This bit is available for read and write.
Default value: 0
DFMS = 0
DFMS = 1
Monaural (default)
Stereo input enabled
The DFMS bit is used to enable stereo operation in DF bypass mode. In the DF bypass mode, when DFMS is set
to 0, the pin for the input data is PDATA (pin 5) only, therefore the DSD1794 operates as a monaural DAC. When
DFMS is set to 1, the DSD1794 can operate as a stereo DAC with inputs of L-channel and R-channel data on
DSDL (pin 1) and DSDR (pin 2), respectively.
FLT: Digital Filter Rolloff Control
This bit is available for read and write.
Default value: 0
FLT = 0
FLT = 1
Sharp rolloff (default)
Slow rolloff
The FLT bit is used to select the digital filter rolloff characteristic. The filter responses for these selections are shown
in the TYPICAL PERFORMANCE CURVES section of this data sheet.
INZD: Infinite Zero Detect Mute Control
This bit is available for read and write.
Default value: 0
INZD = 0
INZD = 1
Infinite zero detect mute disabled (default)
Infinite zero detect mute enabled
The INZD bit is used to enable or disable the zero detect mute function. Setting INZD to 1 forces muted analog outputs
to hold a bipolar zero level when the DSD1794 detects zero data in both channels continuously for 1024 sampling
periods (1/f_S). The infinite zero detect mute function does not work in the DSD mode.
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