EP9301 Datasheet, PDF (26/41 Pages) Cirrus Logic – Entry-level ARM9 System-on-chip Processor

EP9301
Entry Level ARM9 System-on-Chip Processor
Static Memory Turnaround Cycle
Parameter
Symbol
Min
CSnX deassert to CSnY assert time
t_BTcyc
-
Typ
t_HCLK × (IDCY+1)
Max
-
Notes: 1. X and Y represent any two chip select numbers.
2. IDCY occurs on read-to-write and write-to-read.
3. IDCY is honored when going from a asynchronous device (CSx) to a synchronous device (/SDCSy).
Unit
ns
AD
CSnX
CSnY
WRn
RDn
DQMn
DA
WAIT
t_BTcyc
Figure 14. Static Memory Turnaround Cycle Timing Measurement
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