OPA3680 Datasheet, PDF (19/21 Pages) Burr-Brown (TI) – Triple, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER With Disable

DISABLE OPERATION
The OPA3680 provides an optional disable feature on each
channel that may be used either to reduce system power or to
impleme nt a simple channel multiplexing operation. If the DIS
control pin of each channel is left unconnected, the OPA3680
will operate normally. To disable, the control pin must be
asserted LOW. Figure 13 shows a simplified internal circuit for
the disable control feature available on each channel.
The transition edge rate (dv/dt) of the DIS control line will
influence this glitch. For the plot of Figure 14, the edge rate
was reduced until no further reduction in glitch amplitude
was observed. This approximately 1V/ns maximum slew
rate may be achieved by adding a simple RC filter into the
DIS pin from a higher speed logic line. If extremely fast
transition logic is used, a 1kΩ series resistor between the
logic gate and the DIS input pin will provide adequate
bandlimiting using just the parasitic input capacitance on the
DIS pin while still ensuring adequate logic level swing.
+V_S
15kΩ
Q1
25kΩ
110kΩ
V_DIS
I_S
Control
–V_S
FIGURE 13. Simplified Disable Control Circuit.
In normal operation, base current to Q1 is provided through
the 110kΩ resistor, while the emitter current through the
15kΩ resistor sets up a voltage drop that is inadequate to turn
on the two diodes in Q1’s emitter. As V_DIS is pulled LOW,
additional current is pulled through the 15kΩ resistor even-
tually turning on those two diodes (≈100uA). At this point,
any further current pulled out of V_DIS goes through those
diodes holding the emitter-base voltage of Q1 at approxi-
mately zero volts. This shuts off the collector current out of
Q1, turning the amplifier off. The supply current in the
disable mode are only those required to operate the circuit of
Figure 13. Additional circuitry ensures that turn-on time
occurs faster than turn-off time (make-before-break).
When disabled, the output and input nodes go to a high
impedance state. If the OPA3680 is operating in a gain of +1,
this will show a very high impedance at the output and
exceptional signal isolation. If operating at a gain greater than
+1, the total feedback network resistance (R_F + R_G) will
appear as the impedance looking back into the output, but the
circuit will still show very high forward and reverse isolation.
If configured as an inverting amplifier, the input and output
will be connected through the feedback network resistance (R_F
+ R_G) and the isolation will be very poor as a result.
One key parameter in disable operation is the output glitch
when switching in and out of the disabled mode. Figure 14
shows these glitches for the circuit of Figure 1 with the input
signal at 0V. The glitch waveform at the output pin is plotted
along with the DIS pin voltage.
40
Output Voltage
20
(0V Input)
0
–20
–40
V_DIS
4.8V
0.2V
Time (20ns/div)
FIGURE 14. Disable/Enable Glitch.
THERMAL ANALYSIS
Due to the high output power capability of the OPA3680,
heatsinking or forced airflow may be required under extreme
operating conditions. Maximum desired junction tempera-
ture will set the maximum allowed internal power dissipa-
tion as described below. In no case should the maximum
junction temperature be allowed to exceed 175°C.
Operating junction temperature (T_J) is given by T_A + P_D•θ_JA.
The total internal power dissipation (P_D) is the sum of
quiescent power (P_DQ) and additional power dissipated in
the output stage (P_DL) to deliver load power. Quiescent
power is simply the specified no-load supply current times
the total supply voltage across the part. P_DL will depend on
the required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 of either supply voltage (for equal
bipolar supplies). Under this condition, P_DL = V_S2/(4•R_L)
where R_L includes feedback network loading.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As a worst-case example, compute the maximum T_J using an
OPA3680E in the circuit of Figure 1 operating at the
maximum specified ambient temperature of +85°C and
driving a grounded 100Ω load.
P_D = 10V•21mA + 3•[5²/(4•(100Ω || 500Ω))] = 435mW
Maximum T_J = +85°C + (0.44W•100°C/W) = 129°C
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OPA3680