OPA3680 Datasheet, PDF (16/21 Pages) Burr-Brown (TI) – Triple, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER With Disable

advantage that the noise gain becomes equal to 2 for a 50Ω
source impedance—the same as the non-inverting circuits
considered above. However, the amplifier output will now
see the 100Ω feedback resistor in parallel with the external
load. In general, the feedback resistor should be limited to
the 100Ω to 1.5kΩ range. In this case, it is preferable to
increase both the R_F and R_G values as shown in Figure 9 and
then achieve the input matching impedance with a third
resistor (R_M) to ground. The total input impedance becomes
the parallel combination of R_G and R_M.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes
part of the noise gain equation and hence influences the
bandwidth. For the example in Figure 9, the R_M value
combines in parallel with the external 50Ω source imped-
ance, yielding an effective driving impedance of 50Ω ||
84.5Ω = 31.4Ω. This impedance is added in series with R_G
for calculating the noise gain (NG). The resultant NG is 2.6
for Figure 9, as opposed to only 2 if R_M could be eliminated
as discussed above. The bandwidth will therefore be slightly
lower for the gain of –2 circuit of Figure 9 than for the gain
of +2 circuit of Figure 1.
The third important consideration in inverting amplifier
design is setting the bias current cancellation resistor on the
non-inverting input (R_B). If this resistor is set equal to the
total DC resistance looking out of the inverting node, the
output DC error, due to the input bias currents, will be
reduced to (Input Offset Current) • R_F. If the 50Ω source
impedance is DC-coupled in Figure 9, the total resistance to
ground on the inverting input will be 155Ω. Combining this
in parallel with the feedback resistor gives the R_B = 95.6Ω
used in this example. To reduce the additional high fre-
quency noise introduced by this resistor, it is sometimes
bypassed with a capacitor. As long as R_B < 350Ω, the
capacitor is not required since the total noise contribution of
all other terms will be less than that of the op amp’s input
noise voltage. As a minimum, the OPA3680 requires an R_B
value of 50Ω to damp out parasitic-induced peaking—a
direct short to ground on the non-inverting input runs the
risk of a very high frequency instability in the input stage.
drive capabilities, noting that the graph is bounded by a
“Safe Operating Area” of 1W maximum internal power
dissipation for a single channel. Superimposing resistor load
lines onto the plot shows that the OPA3680 can drive ±2.5V
into 25Ω or ±3.5V into 50Ω without exceeding the output
capabilities or the 1W dissipation limit. A 100Ω load line
(the standard test circuit load) shows the full ±3.9V output
swing capability, as shown in the typical specifications.
The minimum specified output voltage and current specifi-
cations over temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold startup will the
output current and voltage decrease to the numbers shown in
the guaranteed tables. As the output transistors deliver power,
their junction temperatures will increase, decreasing their
V_BE’s (increasing the available output voltage swing) and
increasing their current gains (increasing the available out-
put current). In steady-state operation, the available output
voltage and current will always be greater than that shown
in the over-temperature specifications since the output stage
junction temperatures will be higher than the minimum
specified operating ambient.
To maintain maximum output stage linearity, no output
short-circuit protection is provided. This will not normally
be a problem since most applications include a series match-
ing resistor at the output that will limit the internal power
dissipation if the output side of this resistor is shorted to
ground. However, shorting the output pin directly to the
adjacent positive power supply pins will, in most cases,
destroy the amplifier. If additional short-circuit protection
is required, consider a small series resistor in the power
supply leads. Under heavy output loads, this will reduce the
available output voltage swing. A 5Ω series resistor in each
power supply lead will limit the internal power dissipation to
less than 1W for an output short circuit while decreasing the
available output voltage swing only 0.5V for up to 100mA
desired load currents. Always place the 0.1µF power supply
decoupling capacitors after these supply current limiting
resistors directly on the supply pins.
DRIVING CAPACITIVE LOADS
OUTPUT CURRENT AND VOLTAGE
The OPA3680 provides output voltage and current capabili-
ties that are unsurpassed in a low cost monolithic op amp.
Under no-load conditions at +25°C, the output voltage
typically swings closer than 1V to either supply rail; the
guaranteed swing limit is within 1.2V of either rail. Into a
15Ω load (the minimum tested load), it is guaranteed to
deliver more than ±135mA.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage • current, or V-I product,
which is more relevant to circuit operation. Refer to the
“Output Voltage and Current Limitations” plot in the Typi-
cal Performance Curves. The X and Y axes of this graph
show the zero-voltage output current limit and the zero-
current output voltage limit, respectively. The four quad-
rants give a more detailed view of the OPA3680’s output
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an A/D converter—including
additional external capacitance which may be recommended
to improve A/D linearity. A high speed, high open-loop gain
amplifier like the OPA3680 can be very susceptible to
decreased stability and closed-loop response peaking when
a capacitive load is placed directly on the output pin. When
the amplifier’s open-loop output resistance is considered,
this capacitive load introduces an additional pole in the
signal path that can decrease the phase margin. Several
external solutions to this problem have been suggested.
When the primary considerations are frequency response
flatness, pulse response fidelity and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive
load. This does not eliminate the pole from the loop
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OPA3680
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