OPA3682 Datasheet, PDF (17/19 Pages) Burr-Brown (TI) – Triple, Wideband, Fixed Gain BUFFER AMPLIFIER With Disable

In most op amps, increasing the output voltage swing increases
harmonic distortion directly. The Typical Performance Curves
show the 2nd harmonic increasing at a little less than the
expected 2X rate while the 3rd harmonic increases at a little
less than the expected 3X rate. Where the test power doubles,
the difference between it and the 2nd harmonic decreases less
than the expected 6dB while the difference between it and the
3rd decreases by less than the expected 12dB. This also shows
up in the 2-tone, 3rd-order intermodulation spurious (IM3)
response curves. The 3rd-order spurious levels are extremely
low at low output power levels. The output stage continues to
hold them low even as the fundamental power reaches very
high levels. As the Typical Performance Curves show, the
spurious intermodulation powers do not increase as predicted
by a traditional intercept model. As the fundamental power
level increases, the dynamic range does not decrease signifi-
cantly. For two tones centered at 20MHz, with 10dBm/tone
into a matched 50Ω load (i.e., 2Vp-p for each tone at the load,
which requires 8Vp-p for the overall 2-tone envelope at the
output pin), the Typical Performance Curves show a 62dBc
difference between the test-tone power and the 3rd-order
intermodulation spurious levels. This exceptional performance
improves further when operating at lower frequencies.
NOISE PERFORMANCE
The OPA3682 offers an excellent balance between voltage
and current noise terms to achieve low output noise. The
inverting current noise (15pA/√Hz) is significantly lower than
earlier solutions while the input voltage noise (2.2nV√Hz) is
lower than most unity-gain stable, wideband, voltage-feed-
back op amps. This low input voltage noise was achieved at
the price of higher non-inverting input current noise (12pA/
√Hz). As long as the AC source impedance looking out of the
non-inverting node is less than 100Ω, this current noise will
not contribute significantly to the total output noise. The op
amp input voltage noise and the two input current noise terms
combine to give low output noise under a wide variety of
operating conditions. Figure 6 shows the op amp noise analy-
sis model with all the noise terms included. In this model, all
noise terms are taken to be noise voltage or current density
terms in either nV/√Hz or pA√Hz.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 1 shows the general form for the output
noise voltage using the terms shown in Figure 6.
Eq.1
( ) ^{( ) ( ) E}O ⁼
E
2
NI
+
I _BN R _S
2 _{+ 4kTRS}
NG² +
I _BI R _F
2 _{+ 4kTRFNG}
Evaluating these two equations for the OPA3682 circuit and
component values shown in Figure 1 will give a total output
spot noise voltage of 8.4nV/√Hz and a total equivalent input
spot noise voltage of 4.2nV/√Hz. This total input-referred
spot noise voltage is higher than the 2.2nV/√Hz specifica-
tion for the op amp voltage noise alone. This reflects the
noise added to the output by the inverting current noise times
the feedback resistor.
E_NI
OPA3682
E_O
R_S
I_BN
E_RS
√4kTR_S
4kT
R_G
R_F
√4kTR_F
R_G
I_BI
4kT = 1.6E –20J
at 290°K
FIGURE 6. Noise Model.
DC ACCURACY
The OPA3682 provides exceptional bandwidth in high gains,
giving fast pulse settling but only moderate DC accuracy.
The Specifications table shows an input offset voltage com-
parable to high speed voltage-feedback amplifiers. However,
the two input bias currents are somewhat higher and are
unmatched. Bias current cancellation techniques will not
reduce the output DC offset for OPA3682. Since the two
input bias currents are unrelated in both magnitude and
polarity, matching the source impedance looking out of each
input to reduce their error contribution to the output is
ineffective. Evaluating the configuration of Figure 1, using
worst-case +25°C input offset voltage and the two input bias
currents, gives a worst-case output offset range equal to:
±(NG • V_OS(MAX)) + (I_BN • R_S/2 • NG) ± (I_BI • R_F)
where NG = non-inverting signal gain
= ±(2 • 5.0mV) + (55µA • 25Ω • 2) ± (480Ω • 40µA)
= ±10mV + 2.8mV ± 19.2mV
= –26.4mV → +32.0mV
Minimizing the resistance seen by the non-inverting input
will give the best DC offset performance.
Dividing this expression by the noise gain (NG = (1+R_F/R_G))
will give the equivalent input-referred spot noise voltage at the
non-inverting input as shown in Equation 2.
Eq. 2
( ) E_N =
E_NI2 +
I _BN R _S
2
+
4 kTR _S
+


I _BI R _F
NG
²

+
4 kTR _F
NG
17
®
OPA3682