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SHC615 Datasheet, PDF (16/19 Pages) Burr-Brown (TI) – Wide-Bandwidth, DC RESTORATION CIRCUIT
If the high speed TTL-hold command signal goes negative
due to reflections for AC-coupling, the hold control input
must be protected by an external reverse bias diode to
ground as shown in Figure 6.
CIRCUIT LAYOUT
The high-frequency performance of the SHC615 can be
greatly affected by the physical layout of the printed circuit
board. The following tips are offered as suggestions, not as
absolute requirements. Oscillations, ringing, poor bandwidth,
poor settling, and peaking are all typical problems that
plague high-speed components when they are used incor-
rectly.
• Bypass power supplies very close to the device pins.
Use tantalum chip capacitors (approximately 2.2µF);
parallel 470pF and/or 10nF ceramic chip capacitors
may be added if desired. Surface mount types are
recommended because of their low lead inductance.
Supply bypassing is extremely critical at high frequen-
cies and when driving high current loads.
• PC board traces for power lines should be wide to reduce
impedance.
+VCC
(13)
Biasing
OTA
In+
(10)
Biasing
–VCC
(5)
+VCC
(13)
Biasing
CHOLD
(4)
Switching
Stage
Hold Control GND TTL
(7)
(9)
In–
(11)
Biasing
Comparator
(10)
In+
(11) SOTA ∞
In–
BUFFER
AMPLIFIER
Switching Stage
Hold Control
(7)
(a)
CHOLD
(4)
–VCC
(5)
(b)
FIGURE 5. a) Simplified Block Diagram; and, b) Circuit Diagram of the Sampling Comparator which Includes the Sampling
Operational Transconductance Amplifier (SOTA) and the Switching Stage.
®
SHC615
16