BUF11702 Datasheet, PDF (16/24 Pages) Burr-Brown (TI) – MULTI CHANNEL LCD GAMMA CORRECTION BUFFER

BUF11702
BUF07702
SLOS359F − MARCH 2001 − REVISED MAY 2004
INPUT VOLTAGE RANGE GAMMA BUFFERS
Figure 45 shows a typical gamma correction curve with
10 gamma correction reference points (GMA1 through
GMA10). As can be seen from this curve, the voltage
requirements for each buffer vary greatly. The swing
capability of the input stages of the various buffers is
carefully matched to the application. Using the example
of the BUF11702 with 10 gamma correction channels,
buffers 1 to 5 have input stages that include V_DD, but will
only swing within 1V to GND. Buffers 1 through 5 have
only a single NMOS input stage. Buffers 6 through 10
have only a single PMOS input stage. The input range
of the PMOS input stage includes GND.
VDD1
GMA1
GMA2
GMA3
GMA4
GMA5
GMA6
GMA7
GMA8
GMA9
GMA10
VSS10
10
20
30
40
Input Data HEX0
Figure 45. Gamma Correction Curve
OUTPUT VOLTAGE SWING GAMMA BUFFERS
The output stages have been designed to match the
characteristic of the input stage. Once again, using the
example of the BUF11702, this means that the output
stage of buffer 1 swings very close to V_DD, typically
V_CC − 100mV at 5mA; its ability to swing to GND is
limited. Buffers 2 through 5 have smaller output stages
with slightly larger output resistance, as they will not
have to swing as close to the positive rail as buffer 1.
Buffers 6 through 10 swing closer to GND than V_DD.
Buffer 10 is designed to swing very close to GND;
typically, GND + 100mV at a 5mA load current. See the
Typical Characteristics for more details. This approach
significantly reduces the silicon area and cost of the
whole solution. However, due to this architecture, the
correct buffer needs to be connected to the correct
gamma correction voltage. Connect buffer 1 to the
gamma voltage closest to V_DD, and buffers 2 through 5
to the following voltages. Buffer 10 should be connected
to the gamma correction voltage closest to GND (or the
negative rail), and buffers 9 through 6 to the following
higher voltages.
16
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COMMON BUFFER (V_COM)
The common buffer output of the BUF11702 has a
greater output drive capability than buffers 1 through
10, to meet the heavier current demands of driving the
common node of the LCD panel. It was also designed
to drive heavier capacitive loads and still remain stable,
as shown in Figure 46.
45
40
VDD = 10 V
RL = 2 kΩ
35 _VCOM
30
25
20
15
10
5
0
10
100
CL − Load Capacitance − pF
1000
Figure 46. Phase Shift vs Load Capacitance
CAPACITIVE LOAD DRIVE
The BUF11702 has been designed to be able to
sink/source dc currents in excess of 10mA. Its output
stage has been designed to deliver output current
transients with little disturbance of the output voltage.
However, there are times when very fast current pulses
are required. Therefore, in LCD source driver buffer
applications, it is quite normal for capacitors to be
placed at the outputs of the reference buffers. These
capacitors improve the transient load regulation and will
typically vary from 100pF and more. The BUF11702
gamma buffers were designed to drive capacitances in
excess of 100pF and retain effective phase margins
above 50°, as shown in Figure 47.
140
BUF11702: Channels 1 to 10
120 _{BUF07702: Channels 1 to 6}
100
VDD = 10 V
80 RL = 2 kΩ
60
40
20
0
10
100
CL − Load Capacitance − pF
1000
Figure 47. Phase Shift Between Output and Input
vs Load Capacitance for the Gamma Buffers