OPA3875 Datasheet, PDF (14/22 Pages) Burr-Brown (TI) – Triple 2:1 High-Speed Video Multiplexer

OPA3875
SBOS341B – DECEMBER 2006 – REVISED DECEMBER 2006
DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
A printed circuit board (PCB) is available to assist in
the initial evaluation of circuit performance using the
OPA3875. The fixture is offered free of charge as an
unpopulated PCB, delivered with a user's guide. The
summary information for this fixture is shown in
Table 1.
Table 1. OPA3875 Demonstration Fixture
PRODUCT PACKAGE ORDERING NUMBER
OPA3875IDBQ SSOP-16
DEM-TIV-SSOP-3A
LITERATURE
NUMBER
SBOU043
The demonstration fixture can be requested at the
Texas Instruments web site at (www.ti.com) through
the OPA3875 product folder.
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This is
particularly true for video and RF amplifier circuits
where parasitic capacitance and inductance can
have a major effect on circuit performance. A SPICE
model for the OPA875 is available through the Texas
Instruments web site at www.ti.com. Use three of
these models to simulate the OPA3875. These
models do a good job of predicting small-signal AC
and transient performance under a wide variety of
operating conditions. They do not do as well in
predicting the harmonic distortion or dG/dP
characteristics. These models do not attempt to
distinguish between the package types in their
small-signal AC performance nor do they predict
channel-to-channel effects.
OPERATING SUGGESTIONS
DRIVING CAPACITIVE LOADS
One of the most demanding, yet very common load
conditions is capacitive loading. Often, the capacitive
load is the input of an ADC—including additional
external capacitance that may be recommended to
improve ADC linearity. A high-speed device such as
the OPA3875 can be very susceptible to decreased
stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin.
When the device open-loop output resistance is
considered, this capacitive load introduces an
additional pole in the signal path that can decrease
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the phase margin. Several external solutions to this
problem have been suggested. When the primary
considerations are frequency response flatness,
pulse response fidelity, and/or distortion, the simplest
and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series
isolation resistor between the amplifier output and
the capacitive load. This isolation resistor does not
eliminate the pole from the loop response, but rather
shifts it and adds a zero at a higher frequency. The
additional zero acts to cancel the phase lag from the
capacitive load pole, thus increasing the phase
margin and improving stability.
The Typical Characteristics show the recommended
R_S versus capacitive load and the resulting
frequency response at the load; see Figure 5 and
Figure 6, respectively. Parasitic capacitive loads
greater than 2pF can begin to degrade the
performance of the OPA3875. Long PCB traces,
unmatched cables, and connections to multiple
devices can easily cause this value to be exceeded.
Always consider this effect carefully, and add the
recommended series resistor as close as possible to
the OPA3875 output pin (see the Board Layout
Guidelines section).
DC ACCURACY
The OPA3875 offers excellent DC signal accuracy.
Parameters that influence the output DC offset
voltage are:
• Output offset voltage
• Input bias current
• Gain error
• Power-supply rejection ratio
• Temperature
Leaving both temperature and gain error parameters
aside, the output offset voltage envelope can be
described as shown in Equation 1:
| | V_{OSO_envelope}
=
V_OSO + (R_S·I_b) x G ±
5 - (V_S+)
x
10^-
PSRR+
20
±
|-5
-
(V_S+)|
x
10^-
PSRR-
20
+
V_CM
x
10^-
CMRR
20
With:
V_OSO: Output offset voltage
R_S: Input resistance seen by R0, R1, G0, G1,
B0, or B1.
I_b: Input bias current
G: Gain
V_S+: Positive supply voltage
V_S–: Negative supply voltage
PSRR+: Positive supply PSRR
PSRR–: Negative supply PSRR
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