CS4330 Datasheet, PDF (11/38 Pages) Cirrus Logic – 8 Pin Stereo D/A Converter for Digital Audio

CS4330, CS4331, CS4333
LRCK
SCLK
SDATA
Left Channel
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
External SCLK Mode
I²S, 18-Bit Data
Data Valid on Rising Edge of SCLK
SCLK must have at least 36 cycles per LRCK
Figure 6. CS4331 External SCLK Data Format (I²S)
LRCK
SCLK
SDATA
Left Channel
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Internal SCLK Mode
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
INT SCLK = 32 Fs if MCLK/LRCK = 512 or 256
INT SCLK = 48 Fs if MCLK/LRCK = 384
External SCLK Mode
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
SCLK must have at least 32 cycles per LRCK
Figure 7. CS4333 SCLK Data Format
DS136F1
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