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CS22250 Datasheet, PDF (10/32 Pages) Cirrus Logic – WIRELESS 10BT CONTROLLER
This section provides detailed information on the CS22250 signals. The signal descriptions are
useful for hardware designers who are interfacing the CS22250 with other devices.
System Memory Interface
The system memory interface supports standard SDRAM interface, Async SRAM and FLASH.
There are a total of 37 signals in this interface.
SMCLK
Output
System mem clock for SDRAM. Currently the interface supports 103
MHz for a maximum bandwidth of 200Mbytes/sec.
nSMCS0
Output
Chip select bit 0. This signal is used to select or deselect the SDRAM for
command entry. When SMNCS is low it qualifies the sampling of
nSMRAS, nSMCAS and nSMWE. Also, used as testmode(2) when
NTEST pin is '0'.
nSMCS1
Output
Chip select bit 1.
NBRCE
Output
Chip select for ROM access. This signal is used to select or deselect the
boot ROM memory. Also used during reset to latch in the strap value for
Ethernet; if set to a '1' implies Ethernet functional unit block is ‘enable’.
NSMRAS
Output
Row address select. Used in combination with nSMCAS, nSMWE and
nSMCS to specify which SDRAM page to open for access. Also used
during reset to latch in the strap value for clk_bypass; if set to a '1'
implies bypassing clock module; whatever clk is applied on the input
clock is used for memclk and ctlclk. Also shared as the ROMOE signal.
NSMCAS
Output
Column address select. Used in combination with nSMRAS, nSMWE
and nSMCS to specify which piece of data to access in selected page.
Also used during reset to latch in the strap value for same_freq; if set to
a '1' implies internal mem_clk and arm_clk are running at the same
frequency and 180 degrees out of phase.
NSMWE
Output
Write Enable. Used in combination with nSMRAS, nSMCAS, and
nSMWE to specify whether the current cycle is a read or a write cycle.
Also used during reset to latch in the strap value for tst_bypass; if set to
a '1' implies PLL bypass. Also shared as the ROMWE to do flash
programming.
CS22250 Wireless 10BT Controller
10 of 32
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DS551PP2 Rev. 3.0