BS62LV256_08 Datasheet, PDF (1/10 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 32K X 8 bit

Very Low Power CMOS SRAM
32K X 8 bit
Pb-Free and Green package materials are compliant to RoHS
BS62LV256
„ FEATURES
y Wide V_CC operation voltage : 2.4V ~ 5.5V
y Very low power consumption :
V_CC = 3.0V Operation current : 25mA (Max.) at 70ns
1mA (Max.) at 1MHz
Standby current : 0.4/0.7uA(Max.) at 70^OC/85^OC
V_CC = 5.0V Operation current : 40mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current : 4/5uA (Max.) at 70^OC/85^OC
y High speed access time :
-55
55ns(Max.) at V_CC : 4.5~5.5V
-70
70ns(Max.) at V_CC : 3.0~5.5V
y Automatic power down when chip is deselected
y Easy expansion with CE and OE options
y Three state outputs and TTL compatible
y Fully static operation
y Data retention supply voltage as low as 1.5V
„ DESCRIPTION
The BS62LV256 is a high performance, very low power CMOS Static
Random Access Memory organized as 32,768 by 8 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with maximum CMOS standby
current of 0.7uA/5uA at 3V/5V at 85^OC and maximum access time of
55/70ns.
Easy memory expansion is provided by an active LOW chip enable
(CE), and active LOW output enable (OE) and three-state output
drivers.
The BS62LV256 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV256 is available in DICE form, JEDEC standard 28 pin
330mil Plastic SOP, 600mil Plastic DIP, 8mmx13.4mm TSOP
(normal type).
„ POWER CONSUMPTION
PRODUCT
FAMILY
BS62LV256DC
BS62LV256PC
BS62LV256SC
BS62LV256TC
BS62LV256PI
BS62LV256SI
BS62LV256TI
POWER DISSIPATION
OPERATING
STANDBY
Operating
TEMPERATURE
(I_CCSB1, Max)
(I_CC, Max)
V_CC=5.0V V_CC=3.0V
1MHz
V_CC=5.0V
10MHz
f_Max.
V_CC=3.0V
1MHz 10MHz
f_Max.
Commercial
+0^OC to +70^OC
4.0uA
0.4uA 1.5mA 18mA
35mA 0.8mA 12mA
20mA
Industrial
-40^OC to +85^OC
5.0uA
0.7uA
2mA
20mA 40mA
1mA
15mA
25mA
PKG TYPE
DICE
PDIP-28
SOP-28
TSOP-28
PDIP-28
SOP-28
TSOP-28
„ PIN CONFIGURATIONS
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1_•
28
2
27
3
26
4
25
5
24
6 _BS62LV256PC 23
7 _BS62LV256PI 22
8 BS62LV256SC 21
9 ^BS62LV256SI 20
10
19
11
18
12
17
13
16
14
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
OE 1
A11 2
A9 3
A8 4
A13 5
WE 6
VCC 7
A14 8
A12 9
A7 10
A6 11
A5 12
A4 13
A3 14
BS62LV256TC
BS62LV256TI
28 A10
27 CE
26 DQ7
25 DQ6
24 DQ5
23 DQ4
22 DQ3
21 GND
20 DQ2
19 DQ1
18 DQ0
17 A0
16 A1
15 A2
„ BLOCK DIAGRAM
A5
A6
A7
A12
A14
A13
A8
A9
A11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE
WE
OE
VCC
GND
Address
9
Input
Buffer
512
Row
Decoder
Memory Array
512X512
8
Data
Input
8
Buffer
8
8
Data
Output
Buffer
Control
512
Column I/O
Write Driver
Sense Amp
64
Column Decoder
6
Address Input Buffer
A4 A3 A2 A1 A0 A10
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS62LV256
1
Revision 2.7
Oct.
2008