BS616UV1610 Datasheet, PDF (1/10 Pages) Brilliance Semiconductor – Ultra Low Power/Voltage CMOS SRAM 1M X 16 bit

BSI ^{Ultra Low Power/Voltage CMOS SRAM}
1M X 16 bit
BS616UV1610
„ FEATURES
• Ultra low operation voltage : 1.8 ~ 2.3V
• Ultra low power consumption :
Vcc = 2.0V C-grade: 25mA (Max.) operating current
I-grade : 30mA (Max.) operating current
1.2uA (Typ.) CMOS standby current
• High speed access time :
-70
70ns (Max.) at Vcc=2V
-10 100ns (Max.) at Vcc=2V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2,CE1 and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
„ DESCRIPTION
The BS616UV1610 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 1,048,576 words by 16 bits and
operates from a wide range of 1.8V to 2.3V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 1.2uA and maximum access time of 70/100ns in 2V operation.
Easy memory expansion is provided by an active LOW chip enable(CE1),
active HIGH chip enable (CE2), active LOW output enable(OE) and
three-state output drivers.
The BS616UV1610 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV1610 is available in 48-pin BGA package.
„ PRODUCT FAMILY
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=2V
BS616UV1610BC
BS616UV1610FC
BS616UV1610BI
BS616UV1610FI
+0^O C to +70^OC
-40^O C to +85^OC
1.8 ~ 2.3V
1.8 ~ 2.3V
70 / 100
70 / 100
POWER DISSIPATION
STANDBY
(ICCSB1 , Max)
Operating
(I CC , Max)
Vcc=2V
Vcc=2V
30uA
25mA
40uA
30mA
PKG TYPE
BGA - 48- 0810
BGA - 48- 0912
BGA - 48- 0810
BGA - 48- 0912
„ PIN CONFIGURATIONS
„ BLOCK DIAGRAM
1
2
3
4
5
6
A LB OE A0 A1 A2 CE2
B D8 UB A3 A4 CE1 D0
C D9 D10 A5 A6 D1 D2
D _VSS D11 A17 A7 D3 _VCC
E VCC ^D12 VSS ^{A16 D4} VSS
F D14 D13 A14 A15 ^{D5 D6}
G D15 NC. A12 A13 WE D7
H A18 A8 A9 A10 A11 A1. 9
48-Ball CSP top View
A4
A3
A2
A1
A0
A17
A16
A15
A14
A13
A12
D0
.
.
.
.
D15
Address
22
Input
Buffer
Row
2048
Decoder
Data
16
Input
16
.
Buffer
.
.
16
.
Data
Output
16
Buffer
Memory Array
2048 x 8192
8192
Column I/O
Write Driver
Sense Amp
512
Column Decoder
CE2
CE1
WE
OE
UB
LB
Vcc
Gnd
Control
18
Address Input Buffer
A11A10A9 A8 A7 A6 A5 A18 A19
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
R0201-BS616UV1610
1
Revision 2.2
April 2001