HCPL-576X Datasheet, PDF (7/11 Pages) Agilent(Hewlett-Packard) – AC/DC to Logic Interface Hermetically Sealed Optocouplers

HCPL-576x, 5962-8947701
Data Sheet
e. D₁ and D₂ are Schottky diodes; D₃ and D₄ are zener diodes.
f. Device considered a two-terminal device: Pins 1, 2, 3, 4 connected together, Pins 5, 6, 7, 8 connected together.
g. This is a momentary withstand test, not an operating condition.
h. The 1.8-kΩ load represents 1 TTL unit load of 1.6 mA and the 4.7-kΩ pull-up resistor.
i. The t_PHL propagation delay is measured from the 2.5V level of the leading edge of a 5.0V input pulse (1 μs rise time) to the 1.5V level on the leading edge of
the output pulse (see Figure 7).
j. The t_PLH propagation delay is measured from the 2.5V level of the trailing edge of a 5.0V input pulse (1 μs fall time) to the 1.5V level on the trailing edge of the
output pulse (see Figure 7).
k. Common mode transient immunity in Logic High level is the maximum tolerable dV_CM/dt of the common mode voltage, V_CM, to ensure that the output
remains in a Logic High state (i.e., V_O > 2.0V). Common mode transient immunity in Logic Low level is the maximum tolerable dV_CM/dt of the common mode
voltage, V_CM, to ensure that the output remains in a Logic Low state (i.e., V_O < 0.8V). See Figure 8.
l. In applications where dV_CM/dt might exceed 50,000 V/μs (such as static discharge), a series resistor, R_CC, should be included to protect the detector IC from
destructively high surge currents. The recommended value for R_CC is 240Ω per volt of allowable drop in V_CC (between Pin 8 and V_CC) with a minimum value
of 240Ω.
m. Parameters shall be tested as part of device initial characterization and after process changes. Parameters shall be guaranteed to the limits specified for all
lots not specifically tested.
Typical Characteristics
Parameter
Symbol
Typ^a
Unit
Test Conditions
Fig.
Hysteresis
Input Clamp Voltage
Bridge Diode Forward Voltage
Input-Output Resistance
Input-Output Capacitance
Input Capacitance
Output Rise Time (10% to 90%)
Output Fall Time (90% to 10%)
I_HYS
V_HYS
V_ILC
V_D1,2
V_D3,4
R_I-O
C_I-O
C_IN
t_r
t_f
1.2
1.1
–0.76
0.62
0.73
10¹²
2.0
50
10
0.5
mA
I_HYS = I_TH+ – I_TH–
1
V
V_HYS = V_TH+ – V_TH–
V
V_ILC = V₂ – V₃; V₃ = GND; I_IN = –10 mA
I_IN = 3 mA (see Schematic)
Ω
V_I-O = 500 Vdc
pF
f = 1 MHz, V_I-O = 0 Vdc
pF
f = 1 MHz; V_IN = 0V, Pins 2, 3; Pins 1, 4 Open
µs
7
µs
7
a. All typical values are at T_A = 25°C, V_CC = 5V unless otherwise noted.
b. Device considered a two terminal device: Pins 1, 2, 3, 4 connected together, Pins 5, 6, 7 8 connected together.
Figure 1 Typical Transfer Characteristics
Figure 2 Typical dc Threshold Levels vs. Temperature
Notes
b
Broadcom
-7-