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BCM1250 Datasheet, PDF (1/2 Pages) Broadcom Corporation. – HIGH PERFORMANCE INTEGRATED 64 BIT MULTIPROCESSOR | |||
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BCM1250
PRODUCT
®
Brief
BCM1250 HIGH-PERFORMANCE, INTEGRATED 64-BIT MULTIPROCESSOR
BCM1250 FEATURES
⢠Two 64-bit MIPS CPUs, scalable from
600 MHzâ1 GHz
⢠Quad-issue in order pipeline; dual execute, dual memory pipes
⢠Enhanced skew pipeline enables zero load-to-use penalty
⢠32-KB instruction cache, 32-KB data cache
⢠Advanced branch predictors
⢠Fast, on-chip multiprocessor bus
⢠Connects the CPUs, L2 cache, memory controller and I/O bridges
⢠Runs at half the CPU core frequency; 256 bits wide
⢠On-chip L2 cache
⢠512 KB, shared by both CPUs
⢠4-way associative, ECC protected
⢠Ways can be removed to provide fast on-chip RAM
⢠DDR memory controller
⢠Two channels, each with a 64-bit data bus plus optional ECC
⢠Runs up to 200 MHz clock rate, 400 MHz data rate
⢠Support for DDR SDRAM, SGRAM, and FCRAM
⢠High-speed packet interfaces
⢠Three 10/100/1000 Ethernet MACs; 802.3 compliant
⢠Option to configure MACs into packet FIFOs
⢠Up to two packet FIFOs each capable of OC-48 data rates
⢠PCI interface
⢠32 bits, 33/66 MHz (PCI 2.2)
⢠Host bridge or target device
⢠HyperTransportTM (formerly LDT) I/O interface
⢠Complies with HyperTransportTM standard for high-speed I/O
fabric
⢠500-MHz clock rate, double data rate, for 600 MHz CPUs;
600-MHz clock rate for 800 MHz CPUs
⢠Peak bandwidth of 9.6 Gbps in each direction @ 600 MHz
⢠Supports double-ended fabrics (to link two BCM1250s)
⢠Integrated system I/O
⢠Generic I/O for direct connect to boot ROM, flash
⢠Two SMBus serial configuration interfaces
⢠PCMCIA control interface
⢠Two serial interfaces
⢠Extensive, on-chip debug features
⢠8â10W power dissipation @ 800 MHz
⢠Support for leading operating systems including
VxWorks®, Linux® and NetBSD
⢠Evaluation board platform available with tools,
firmware and software drivers
SUMMARY OF BENEFITS
⢠Industry-leading performance
⢠Processing speed of up to 10 Mpps*
⢠128 Gbps on-chip bus bandwidth; 50 Gbps memory
bandwidth, 30 Gbps total I/O bandwidth
⢠Low power dissipation of 8â10W (@ 800 MHz)
⢠High functional integration
⢠Programming ease and flexibility based on MIPS64
Instruction Set Architecture (ISA)
⢠Scalable multiprocessor chip and system architecture
⢠Broad tools and system software support
⢠For additional information on the BCM1250
evaluation boards, refer to the BCM91250A and
BCM91250E product briefs
*Based on internal Broadcom benchmark, using BCM1250 for
standard IPv4 L3 look-up/switching.
TARGET APPLICATIONS
Due to the BCM1250's world-class performance, power
efficiency and integration, the processor is ideal for a
broad variety of applications including:
⢠Enterprise workgroup and backbone switches
⢠VPN switches/routers
⢠Multiservice access concentrators
⢠SAN routers/gateway/switches
⢠IP services/subscriber management platforms
⢠Web-server switches
⢠High-end firewall/intrusion detection devices
⢠Wireless basestations
Example: Packet Processing Blade
24
10/100
Ports
BCM5238
BCM5238
SMII
BCM5238
BCM5615
24-10/100
+2-Gigabit
Ports
4
10/100
/1000
Ports
SGMII
BCM5404
BCM5680
8-Port
10/100/1000
BASE-T
Aggregation,
L2/L3 Switching
BCM5840
2,400 Mbps
IPSec
PCI
FPGA
HyperTransport
BCM
GMII 1250
DDR
DRAM
GMII BCM
1250
DDR
DRAM
Deep Packet
Look-up,
L4-L7 Processing
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