AZP51 Datasheet, PDF (3/9 Pages) Arizona Microtek, Inc – Low Phase Noise Sine Wave to LVPECL Buffer/Divider

AZP51
AZP52
AZP53
AZP54
SIGNAL DESCRIPTION
PIN/PAD
D
Q,Q¯
EN
DIV_SEL
EN_SEL
V_DD
GND
FUNCTION
Sine or LVCMOS Input
LVPECL Outputs
Output Enable
Divide Select (AZP53 only)
Enable Select (AZP53 only)
Positive Supply
Negative Supply (Ground)
DIV-SEL OPERATION
PART DIV-SEL
NUMBER
AZP51
AZP54
AZP52
AZP53
-²
-²
NC¹,L
H
1. NC – no connection
2. Internally connected
DIVIDE
RATIO
÷1
÷2
÷1
÷2
FUNCTIONAL OPERATION
PART
NUMBER
INPUTS
EN_SEL⁷ EN
EN
D
EN LOGIC
PULLUP/
PULLDOWN
AZP51
AZP52
-²
NC¹, H
L
H
Active High⁴
Pullup
L
X⁵
AZP53
NC¹, H
NC¹, L
L
H
Active Low³
H
X⁵
L
NC¹, H
L
H
Active High⁴
L
X⁵
Pulldown
Pullup
AZP54
-²
NC¹, L
L
H
Active Low³
Pulldown
H
X⁵
1. NC – no connection
2. Internally tied
3. Active Low: Output enabled when EN low, Tri-state when EN high
4. Active High: Output enabled when EN high, Tri-state when EN low
5. X – Don’t care
6. Z – High impedance
7. EN_SEL input has an internal pullup resistor
8. ÷1 modes only
OUTPUTS
Q Q¯
L⁸
H⁸
H⁸
L⁸
Z⁶
Z⁶
L⁸
H⁸
H⁸
L⁸
Z⁶
Z⁶
L⁸
H⁸
H⁸
L⁸
Z⁶
Z⁶
L
H
H
L
Z⁶
Z⁶
December 2009 * REV - 2
www.azmicrotek.com
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