G141I1-L01 Datasheet, PDF (15/26 Pages) AZ Displays – TFT LCD Tentative Specification

Issued Date: Jun. 18, 2008
Model No.: G141I1 - L01
Tentative
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The specifications of input signal timing are as the following table and timing diagram.
Signal
DCLK
DE
Item
Frequency
Vertical Total Time
Vertical Active Display Period
Vertical Active Blanking Period
Horizontal Total Time
Horizontal Active Display Period
Horizontal Active Blanking Period
Symbol
1/Tc
TV
TVD
TVB
TH
THD
THB
Min.
(63.9)
802
800
TV-TVD
1360
1280
TH-THD
Typ.
71
823
800
23
1440
1280
160
Max.
(74.5)
1030
800
TV-TVD
1600
1280
TH-THD
Unit
MHz
TH
TH
TH
Tc
Tc
Tc
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
Note
-
-
-
-
-
DE
DCLK
DE
DATA
INPUT SIGNAL TIMING DIAGRAM
Tv
TVD
TH
TC
THD
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The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification. Version 0.0