HFBR-53A3VEMZ Datasheet, PDF (9/13 Pages) AVAGO TECHNOLOGIES LIMITED – RoHS Compliant 3.3 V 1 x 9 Fiber Optic Transceivers for Fibre Channel

3.3 Vdc
+
GND
LASER
DRIVER
CIRCUIT
PECL
INPUT
HFBR-53A3VEMZ/VFMZ
FIBER-OPTIC
TRANSCEIVER
SIGNAL
DETECT
CIRCUIT
V_EET ⁹
8
TD+
100 Ω
TD- 7
V_CCT ⁶
V_CCR ⁵
50 Ω
50 Ω
C2
0.1 µF
L2
1 µH
L1
C1 + C8 1 µH
0.1
10 µF*
µF
0.1
µF
C3
0.1
µF
R13
150
3.3 V
+ C4
10
µF
V_CC2 V_EE2
TD+
OUTPUT
DRIVER
TD-
R12
150
CLOCK
SYNTHESIS
CIRCUIT
PARALLEL
TO SERIAL
CIRCUIT
HDMP-1636A/-1646A
SERIAL/DE-SERIALIZER
(SERDES - 10 BIT
TRANSCEIVER)
SD 4
TO SIGNAL DETECT (SD)
INPUT AT UPPER-LEVEL-IC
PRE-
AMPLIFIER
POST-
AMPLIFIER
RD- 3
RD+ 2
V_EER ¹
50 Ω
R14
100
50 Ω
NOTES:
USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.
USE 50 Ω MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.
LOCATE 50 Ω TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.
RD-
INPUT
BUFFER
RD+
CLOCK
RECOVERY
CIRCUIT
SERIAL TO
PARALLEL
CIRCUIT
SEE HDMP-1636A/-1646A DATA SHEET FOR
DETAILS ABOUT THIS TRANSCEIVER IC.
Figure 3. Recommended HFBR-53A3VEMZ/VFMZ fiber-optic transceiver and HDMP-1636A/1646A SERDES integrated circuit transceiver interface and power
supply filter circuits.
20.32
0.800
(2X)
ø
1.9
0.075
±
±
0.1
0.004
–A–
Ø0.000 M A
20.32
0.800
(9X)
ø
0.8
0.032
±
±
0.1
0.004
Ø0.000 M A
(8X)02..15040
TOP VIEW
Figure 4. Recommended board layout hole pattern.
9