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HCPL-7860-300E Datasheet, PDF (8/18 Pages) AVAGO TECHNOLOGIES LIMITED – Optically Isolated Sigma-Delta (S-D) Modulator
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Electrical Specifications (Tested with HCPL-0872 or Sinc3 Filter)
Unless otherwise noted, all specifications are at VIN+ = -200 mV to +200 mV and VIN- = 0 V; all Typical specifications are
at TA = 25°C and VDD1 = VDD2 = 5 V, and all Minimum and Maximum specifications apply over the following ranges: TA =
-40°C to +85°C, VDD1 = 4.5 to 5.5 V and VDD2 = 4.5 to 5.5 V.
STATIC CHARACTERISTICS
Parameter
Resolution
Integral Nonlinearity
Symbol
INL
Differential Nonlinearity
DNL
Uncalibrated Input Offset
VOS
Offset Drift vs. Temperature
dVOS/dTA
Offset drift vs. VDD1
dVOS/dVDD1
Internal Reference Voltage
VREF
Absolute Reference Voltage Tolerance
Min. Typ. Max. Units
15
bits
3
30
LSB
0.01 0.14 %
1
LSB
-3
0
3
mV
2
10
μV/°C
0.12
mV/V
320
mV
-4
4
%
Conditions
VIN+ = 0 V
VIN+ = 0 V
VIN+ = 0 V
Fig. Note
7
58
68
9
7
7 10
7
8
82
Reference Voltage
Matching
HCPL-7860
HCPL-786J
VREF Drift vs. Temperature
dVREF/dTA
VREF Drift vs. VDD1
dVREF/dVDD1
Full Scale Input Range
Recommended Input Voltage Range
-1
-2
60
0.2
-VREF
-200
1
2
+VREF
+200
%
%
ppm/°C.
%
mV
mV
TA = 25°C.
82
8
8
11
DYNAMIC CHARACTERISTICS (Digital Interface IC HCPL-0872 is set to Conversion Mode 3.)
Parameter
Symbol Min.
Typ.
Max. Units Conditions
Signal-to-Noise Ratio
SNR
62
73
Total Harmonic Distortion
THD
-67
Signal-to-(Noise + Distortion) SND
66
dB
VIN+ = 35 Hz,
dB
400 mVpk-pk
(141 mVrms)
dB
sine wave.
Fig. Note
9,10
Effective Number of Bits
ENOB 10
12
bits
11 12
Conversion Time
tC2
0.2
0.8
μs
Pre-Trigger Mode 2 1,12 13
tC1
19
23
μs
Pre-Trigger Mode 1 1,12 13
tC0
39
47
μs
Pre-Trigger Mode 0 1,12
Signal Delay
tDSIG
19
23
μs
13 14
Over-Range Detect Time
tOVR1
2.0
3.0
4.2
μs
VIN+ = 0 to 400mV 14
15
Threshold Detect Time (default tTHR1
10
μs
step waveform
16
configuration)
Signal Bandwidth
BW
18
22
kHz
15 17
Isolation Transient Immunity CMR
15
20
kV/μs VISO = 1 kV
18
8
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