AMMC-5025 Datasheet, PDF (8/11 Pages) AVAGO TECHNOLOGIES LIMITED – 30KHz – 80 GHz TWA

Typical Scattering Parameters ^[1], (Continued)
Freq ^S11
S21
[GHz] dB
Mag Phase dB
Mag
83
-16.64 0.15 152.72 6.96
2.23
84
-16.13 0.16 144.48 6.75
2.18
85
-19.10 0.11 166.48 5.98
1.99
86
-13.97 0.20 134.55 5.16
1.81
87
-12.56 0.24 135.11 4.43
1.67
88
-11.57 0.26 131.84 4.03
1.59
89
-12.25 0.24 120.86 1.67
1.21
90
-12.49 0.24 126.24 -0.80
0.91
91
-13.24 0.22 111.67 -3.93
0.64
92
-12.60 0.23 116.82 -7.69
0.41
93
-15.19 0.17 115.46 -12.24 0.24
94
-15.57 0.17 98.36
-15.43 0.17
95
-15.73 0.16 82.30
-18.17 0.12
96
-14.37 0.19 97.00
-21.79 0.08
97
-12.01 0.25 81.38
-24.88 0.06
98
-7.91
0.40 75.00
-27.42 0.04
99
-12.46 0.24 65.38
-31.17 0.03
100 -11.59 0.26 68.80
-34.78 0.02
Note:
1. Data obtained from an on-wafer condition.
Phase
43.86
11.94
-15.86
-48.54
-79.68
-115.31
-149.46
168.79
139.06
99.48
70.72
40.10
15.26
-13.16
-34.33
-66.49
-91.90
-113.10
S12
dB
-28.93
-28.86
-29.68
-31.27
-31.35
-32.51
-34.59
-35.60
-37.67
-42.20
-45.98
-43.49
-46.84
-55.96
-48.03
-49.87
-103.00
-71.50
Mag
3.58E-02
3.61E-02
3.28E-02
2.73E-02
2.71E-02
2.37E-02
1.86E-02
1.66E-02
1.31E-02
7.76E-03
5.03E-03
6.69E-03
4.55E-03
1.59E-03
3.97E-03
3.21E-03
7.08E-06
2.66E-04
Phase
143.86
114.26
76.14
49.12
10.38
-19.05
-63.31
-93.76
-137.97
-120.24
-167.53
148.42
137.70
153.58
110.84
38.33
92.96
-26.59
S22
dB
-15.28
-11.71
-11.91
-9.97
-9.78
-11.31
-8.64
-6.63
-4.99
-4.60
-3.23
-2.13
-2.13
-2.46
-1.60
-0.85
-1.52
-2.62
Mag Phase
0.17 36.42
0.26 20.29
0.25 11.38
0.32 -0.26
0.32 -6.24
0.27 -1.38
0.37 -2.01
0.47 0.98
0.56 -3.49
0.59 -7.41
0.69 -14.77
0.78 -17.32
0.78 -29.11
0.75 -35.83
0.83 -40.19
0.91 -52.74
0.84 -55.74
0.74 -41.36
Application and Usage
AMMC-5025 is biased with a single positive drain supply
(V_dd), a negative gate supply (V_g1), and has a positive
control gate supply (V_g2). For best overall performance,
the recommended bias condition for the AMMC-5025 is
V_dd = 5 V and I_dd = 100 mA. To achieve this drain current
level, Vg1 is typically –1.8V. Typically, DC current flow for
V_g1 is –10 mA. Open circuit is the default setting for V_g2
when not utilizing gain control. Minor improvements in
performance are possible depending on the application.
The drain bias voltage range is 3 to 6V and the quiescent
drain current biasing range is 80mA to 120mA.
Input and output RF ports are DC coupled; therefore, DC
decoupling capacitors are required if there are DC paths.
RF bond connections should be kept as short as possible
to reduce RF lead inductance which will degrade perfor-
mance above 20 GHz.
Ground connections are made with plated through-holes
to the backside of the device; therefore, ground wires are
not needed.
Using the simplest form of assembly (Figure 11), the
device is capable of delivering flat gain over a 2-80 GHz
range with a minimum of gain slope and ripple. Figure 11
shows a typical assembly application.
However, this device is designed with DC coupled RF I/O
ports, and operation may be extended to lower frequen-
cies (<2 GHz) through the use of off-chip low-frequency
extension circuitry and proper external biasing compo-
nents. With low frequency bias extension it may be used
in a variety of time-domain applications (through 80
Gb/s).
Refer to the low frequency extension section of Avago
Applications Note 5359 “AMMC-5024 30KHz-40GHz TWA
Operational Guide” for detailed information on use below
2 GHz.
Note:
1. Eutectic attach is not recommended and may jeopardize reliability
of the device.
8