HFBR-7924EWZ Datasheet, PDF (6/17 Pages) AVAGO TECHNOLOGIES LIMITED – Four-Channel Pluggable Parallel Fiber Optic Transceiver Part of the Avago Technologies METRAK family

Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parame-
ter in isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that
limiting values of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum
ratings for extended periods can adversely affect device reliability.
Parameter
Storage Temperature
Supply Voltage
Data/Control Signal Input Voltage
Transmitter Differential Input Voltage
Output Current (dc)
Relative Humidity (Non Condensing)
Symbol
T_S
V_CC
V_I
| V_D |
I_D
RH
Minimum
-40
-0.5
-0.5
5
Maximum
+100
4.6
V_CC + 0.5
2
25
95
Unit
Reference
ºC
V
V
V
1
mA
%
Recommended Operating Conditions
Recommended Operating Conditions specify conditions for which the optical and electrical characteristics hold. Optical and
electrical characteristics are not specified for operation beyond the Recommended Operating Conditions, reliability is not im-
plied and damage to the device may occur for such operation over an extended time period.
Parameter
Symbol Minimum Typical Maximum Unit
Reference
Case Temperature
Supply Voltage
Signaling Rate/Channel
T_C
0
+80
ºC
2, Figures 2,
V_CC
3.135
3.3
3.465
V
Figure 8
1
2.7
GBd
Data Input Differential Peak-to-PeakVoltage DV_DINP-P 175
Swing
1600
mV_P-P 3, Figures 11,12
Data Input Rise & Fall Time (20-80%)
Control Input Voltage High
Control Input Voltage Low
Power Supply Noise
t_r, t_f
V_IH
2.0
V_IL
V_EE
N_P
160
ps
V_CC
V
0.8
V
200
mV_P-P 4, Figure 8
Data I/O Coupling Capacitors
C_AC
Receiver Differential Data Output Load
R_DL
0.1
µF
5, Figure 9
100
W
Figure 9
Notes:
1. This is the maximum voltage that can be applied across the Transmitter Differential Data Inputs without damaging the input circuit.
2. Case Temperature is measured as indicated in Figure 2.
3. Data inputs are CML compatible. Coupling capacitors are required to block dc. DV_{DIN p-p} = DV_DINH - DV_DINL, where DV_DINH = High State Dif-
ferential Data Input Voltage and DV_DINL = Low State Differential Data Input Voltage.
4. Power Supply Noise is defined at the supply side of the recommended filter for all V_CC supplies over the frequency range from 500 Hz to 2700
MHz with the recommended power supply filter in place.
5. For data patterns with restricted run lengths, e.g. 8B10B encoded data, smaller value capacitors may provide acceptable results.