ACML-7400-000E Datasheet, PDF (6/13 Pages) AVAGO TECHNOLOGIES LIMITED – 3.3 V/5 V 100 MBd High Speed CMOS Digital Isolator

Electrical Specifications
The following specifications apply to ACML-7400 and are applicable to ambient temperature of -40° C ≤ T_A ≤ 105° C,
input supply of 3.0 V ≤ V_DD1 ≤ 3.6 V or 4.5 V ≤ V_DD1 ≤ 5.5 V, and output supply of 3.0 V ≤ V_DD2 ≤ 3.6 V or 4.5 V ≤ V_DD2 ≤ 5.5 V.
All typical specifications at T_A = +25° C.
Parameter
Symbol Min.
Typ.
Max. Unit
Input Supply Current,
No data
I_DD1(0)
5.9*
6.8**
10 mA
Input Supply Current,
I_DD1(25)
16
mA
25 MBd data rate
17
Input Supply Current,
100 MBd data rate
I_DD1(100)
30*
40 mA
31**
40
Output Supply Current, I_DD2(0)
No data
12*
16 mA
13**
Output Supply Current, I_DD2(25)
15
mA
25 MBd
17
Output Supply Current, I_DD2(100)
100 MBd data rate
23*
32 mA
30**
40
Logic Input Current
I_IN
Logic High Output
V_OH
Voltage
-10
10 A
V_DD-0.1 V_DD-0.02
V
0.8*V_DD V_DD-0.25
V
Logic Low Output
V_OL
Voltage
0.02
0.1 V
0.25
0.8 V
* Typical data based on 3.3 V supply, ** Typical data based on 5.0 V supply
Test Conditions
Fig.
No Input
1,7
V_DD1 = 5.5 V
V_DD1 = 3.3 V
V_DD1 = 5.0 V
V_DD1 = 3.6 V
V_DD1 = 5.5 V
12.5 MHz logic 1,7
signal
50 MHz logic 1,7
signal
No Input
2,8
V_DD1 = 5.5 V
V_DD1 = 3.3 V
V_DD1 = 5.0 V
V_DD1 = 3.6 V
V_DD1 = 5.5 V
12.5 MHz logic 2,8
signal
50 MHz logic 2,8
signal
I_OUT = -20 A, V_IN = V_DD1
I_OUT = -4 mA, V_IN = V_DD1
I_OUT = 20 A, V_IN = 0 V
I_OUT = 4 mA, V_IN = 0 V
Notes
1
2
2
3
4
4
The following specifications apply to ACML-7410 and are applicable to ambient temperature of -40° C ≤ T_A ≤ 105° C,
input supply of 3.0 V ≤ V_DD1 ≤ 3.6 V or 4.5 V ≤ V_DD1 ≤ 5.5 V, and output supply of 3.0 V ≤ V_DD2 ≤ 3.6 V or 4.5 V ≤ V_DD2 ≤ 5.5 V.
All typical specifications at T_A = +25° C.
Parameter
Symbol Min.
Typ.
Max. Unit
Input Supply Current,
No data
I_DD1(0)
8.4*
9.4**
11.5 mA
Input Supply Current,
25 MBd data rate
I_DD1(25)
15.5*
mA
17**
Input Supply Current,
100 MBd data rate
I_DD1(100)
28.5*
30.5**
38 mA
40
Output Supply Current, I_DD2(0)
No data
9.5*
10.4**
14.5 mA
Output Supply Current, I_DD2(25)
25 MBd
15*
mA
17**
Output Supply Current, I_DD2(100)
100 MBd data rate
25*
34 mA
30**
40
Logic Input Current
I_IN
-10
10 A
Logic High Output
V_OH
V_DD-0.1 V_DD-0.02
V
Voltage
0.8*V_DD V_DD-0.25
V
Logic Low Output
V_OL
Voltage
0.02
0.1 V
0.25
0.8 V
* Typical data based on 3.3 V supply, ** Typical data based on 5.0 V supply
Test Conditions
Fig.
No Input
3,7
V_DD1 = 5.5 V
V_DD1 = 3.3 V
V_DD1 = 5.0 V
12.5 MHz logic 3,7
signal
V_DD1 = 3.6 V 50 MHz logic 3,7
V_DD1 = 5.5 V ^signal
No Input
4,8
V_DD1 = 5.5 V
V_DD1 = 3.3 V
V_DD1 = 5.0 V
V_DD1 = 3.6 V
V_DD1 = 5.5 V
12.5 MHz logic 4,8
signal
50 MHz logic 4,8
signal
I_OUT = -20 A, V_IN = V_DD1
I_OUT = -4 mA, V_IN = V_DD1
I_OUT = 20 A, V_IN = 0 V
I_OUT = 4 mA, V_IN = 0 V
Notes
1
2
2
3
4
4
6