HFBR-0508 Datasheet, PDF (5/8 Pages) AVAGO TECHNOLOGIES LIMITED – 10 Megabaud Versatile Link Fiber Optic Transmitter and Receiver for 1 mm POF and 200 μm HCS®

HFBR-2528 Receiver
The HFBR-2528 receiver consists of
a silicon PIN photodiode and digitiz-
ing IC to produce a logic compatible
output. The IC includes a unique
circuit to correct the pulse width
distortion of the first bit after a long
idle period. This enables operation
from DC to 10 MBd with low PWD
for arbitrary data patterns.
The receiver output is a “push-pull”
stage compatible with TTL and
CMOS logic. The receiver housing is
a dark, conductive plastic, compat-
ible with all Versatile Link connec-
tors.
GROUND 5
GROUND 8
4 _{NO CONNECT}
3 _VCC
IC
2 _GROUND
1 _VO
SEE NOTES 5,7
HFBR-2528 Receiver, Top View
Electrical and Optical Characteristics: T_A=-40° to +85°C, 4.75 V < V_CC < 5.25 V, unless otherwise noted. HFBR-2528 Receiver
   Parameter
Symbol Min. Typ^.[1] Max. Unit
T_A (°C)   Condition
Note Fig.
Peak POF Sensitivity: P_RL,min -23.0 -21.0 dBm
Minimum Input for -20.0
+25 1 mm POF,
0 to +70 |PWD| < 30 ns
2,6 2,4
Logic “0” -19.5 -40 to +85
Peak POF Overdrive
P_RL,max
Limit:Maximum
Input for Logic “0”
+1.0 +5.0 dBm
+0.0
-1.0
+25 1 mm POF,
0 to +70 |PWD| < 30 ns
-40 to +85
2,3, 1,2,
6
3
Peak POF Off State
P_RH,max
-42 dBm
1 mm POF
2,6,
Limit: Maximum
8
Input for Logic “1”
Peak HCS
P_RL,min -25.0 -23.0 dBm
+25 200 µm HCS,
2,6
Sensitivity: Minimum -22.0
0 to +70 |PWD| < 30 ns
Input for Logic “0” -21.5 -40 to +85
Peak HCS Overdrive
P_RL,max -1.0 +3.0
dBm
+25 200 µm HCS,
2,3,
Limit: Maximum
-2.0
0 to +70 |PWD| < 30 ns
6
Input for Logic “0”
-3.0 -40 to +85
Peak HCS Off State
P_RH,max
-44 dBm
200 µm HCS
2,6,
Limit: Maximum
8
Input for Logic “1”
Supply Current
High Level Output
Voltage
I_CC
V_OH
4.2
27 45
4.7
mA
V
V_O = Open
I_O = -40 µA
Low Level Output
Voltage
V_OL 0.22 0.4
V
I_O = +1.6 mA
Output Rise Time
t_r
12 30
ns
C_L = 10 pF
6
Output Fall Time
t_f
10 30
ns
C_L = 10 pF
6
Thermal Resistance,
θ_jc
200
°C/W
4
Junction to Case
Electric Field
E_MAX
8 V/m
Near Field,
5
Immunity
Electrical

Field Source
Power Supply
PSNI 0.1 0.4
V_pp
Sine Wave
6
Noise Immunity
DC - 10 MHz
Notes:
1. Typical data are at +25°C, V_CC = 5.0 V.
2. Input power levels are for peak (not average) optical input levels. For 50% duty cycle data, peak optical power is twice the average optical
power.
3. Receiver overdrive (P_RL,max) is specified as the limit where |PWD| will not exceed 30 ns. The receiver will be in the correct state (logic “0”) for opti-
cal powers above P_RL,max. However, it may not meet a 30% symbol period PWD if the overdrive limit is exceeded. Refer to Figure 2 for PWD per-
formance at high received optical powers.
4. Typical value measured from junction to PC board solder joint for horizontal mount package, HFBR-2528.
5. Pins 5 and 8 are electrically connected to the conductive housing and are also used for mounting and retaining purposes. It is required that
pins 5 and 8 be connected to ground to maintain conductive housing shield effectiveness.
6. In recommended receiver circuit, with an optical signal from the recommended transmitter circuit.
7. Pin 4 is electrically isolated internally. Pin 4 may be externally connected to pin 1 for board layout compatibility with HFBR-25X1, HFBR-25X2
and HFBR-25X4. Otherwise it is recommended pin 4 be grounded as in Figure 5.
8. BER ≤ 10E-9, includes a 10.8 dB margin below the receiver switching threshold level (signal to noise ratio = 12).