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HCPL-788J Datasheet, PDF (19/20 Pages) AVAGO TECHNOLOGIES LIMITED – Isolation Amplifier with Short Circuit and Overload Detection SO-16 Package
3. Isolation and Insulation
3.1: How many volts will the HCPL-788J The momentary (1 minute) withstand voltage is 5000 V rms per UL1577 and CSA
withstand?
Component Acceptance Notice #5.
3.2: What happens if I don’t use the
470 pF output capacitors Avago
recommends?
These capacitors are to reduce the narrow output spikes caused by high common
mode slew rates. If your application does not have rapid common mode voltage
changes, these capacitors are not needed.
4. Accuracy
4.1: What is the meaning of the offset
errors and gain errors in terms of the
output?
For zero input, the output should ideally be 1/ of V . The nominal slope of the input/
2
REF
output relationship is V divided by 0.504 V. Offset errors change only the DC input
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voltage needed to make the output equal to 1/2 of VREF. Gain errors change only the
slope of the input/output relationship. For example, if V is 4.0 V, the gain should be
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7.937 V/V. For zero input, the output should be 2.000 V. Input offset voltage of ±3 mV
means the output voltage will be 2.000 V ±0.003*7.937 or 2.000 ±23.8 mV when the
input is zero. Gain tolerance of ±5% means that the slope will be 7.937 ±0.397. Over
the full range of ±3 mV input offset error and ±5% gain error, the output voltage will
be 2.000 ±25.0 mV when the input is zero.
4.2: Can the signal to noise ratio be
improved?
Yes. Some noise energy exists beyond the 30 kHz bandwidth of the HCPL-788J.
An external RC low pass filter can be used to improve the signal to noise ratio. For
example, a 680 Ω, 4700 pF RC filter will cut the rms output noise roughly by a factor
of 2. This filter reduces the -3dB signal bandwidth only by about 10%. In applications
needing only a few kHz bandwidth even better noise performance can be obtained.
The noise spectral density is roughly 400 nV/— Hz below 15 kHz (input referred). As an
example, a 2 kHz (680 Ω, 0.1 μF) RC low pass filter reduces output noise to a typical
value of 0.08 mVrms.
4.3: I need 1% tolerance on gain. Does At present Avago does not have a standard product with tighter gain tolerance. A 100
Avago sell a more precise version? Ω variable resistor divider can be used to adjust the input voltage at pin 1, if needed.
4.4: The output doesn’t go all the way
to V when the input is above full
REF
scale. Why not?
Op-amps are used to drive V (pin 12) and ABSVAL (pin 13). These op-amps can
OUT
swing nearly from rail to rail when there is no load current. The internal V is about
DD2
100 mV below the external V . In addition, the pullup and pulldown output tran-
DD2
sistors are not identical in capability. The net result is that the output can typically
swing to within 20 mV of GND and to within 150 mV of V . When V is tied to
2
DD2
REF
VDD2, the output cannot reach VREF exactly. This limitation has no effect on gain — only
on maximum output voltage. The output remains linear and accurate for all inputs
between -200 mV and +200 mV. For the maximum possible swing range, separate V
REF
and V voltages can be used. Since 5.0 V is normally recommended for V , use of
DD2
DD2
4.5 V or 4.096 V references for V allow the outputs to swing all the way up to V (and
REF
REF
down to typically 20 mV).
4.5: Does the gain change if the internal
LED light output degrades with
time?
No. The LED is used only to transmit a digital pattern. Gain is determined by a bandgap
voltage reference and the user-provided V . Avago has accounted for LED degrada-
REF
tion in the design of the product to ensure long life.
4.6: Why is gain defined as V /504 mV,
REF
not V /512 mV as expected, based
REF
on Figure 24?
Ideally gain would be V /512 mV, however, due to internal settling characteristics,
REF
the average effective value of the internal 256 mV reference is 252 mV.
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