HCPL-4506-000E Datasheet, PDF (14/21 Pages) AVAGO TECHNOLOGIES LIMITED – Intelligent Power Module and Gate Drive Interface Optocouplers

Package Characteristics
Over recommended temperature (T_A = -40°C to 100°C) unless otherwise specified.
Parameter
Sym. Device
Min. Typ.* Max. Units Test Conditions
Fig.
Input-Output Momentary V_ISO HCPL-4506 3750 V rms RH < 50%
Withstand Voltage† HCPL-0466 t = 1 min.



HCPL-J456 3750 T_A = 25°C
HCPL-4506 5000
Option020
HCNW4506 5000
Resistance
R_I-O
(Input-Output)

HCPL-4506 10¹²
HCPL-J456
Ω
HCPL-0466
V_I-O = 500 Vdc
HCNW4506 10¹² 10¹³
Capacitance
C_I-O HCPL-4506
(Input-Output) HCPL-0466
0.6
pF f = 1 MHz
HCPL-J456 0.8
HCNW4506 0.5
Note
6,7,10
6,8,10
6,9,
15
6,9,10
6
6
*All typical values at 25°C, V_CC = 15 V.
†The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable), your
equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication num-
ber 5963-2203E.
Notes:
  1.  Derate linearly above 90°C free-air temperature at a rate of 0.8 mA/°C.
  2.  Derate linearly above 90°C free-air temperature at a rate of 1.6 mA/°C.
  3.  Derate linearly above 90°C free-air temperature at a rate of 3.0 mW/°C.
  4.  Derate linearly above 90°C free-air temperature at a rate of 4.2 mW/°C.
  5.  CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (I_O) to the forward LED input current (I_F) times 100.
  6.  Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
  7.  In accordance with UL 1577, each optocoupler is proof tested by apply­ing an insulation test voltage ≥4500 V rms for 1 second (leakage
detection current limit, I_I-O ≤5 µA).
8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
detection current limit, I_i-o ≤ 5 µA).
9. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
detection current limit, I_I-O ≤ 5 µA).
10. This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table, if ap-
plicable.
11. Pulse: f = 20 kHz, Duty Cycle = 10%.
12. The internal 20 kΩ resistor can be used by shorting pins 6 and 7 together.
13. Due to tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can be improved
by using an external 20 kΩ 1% load resistor. For more information on how propagation delay varies with load resistance, see Figure 8.
14. The R_L = 20 kΩ, C_L = 100 pF load represents a typical IPM (Intelligent Power Module) load.
15. See Option 020 data sheet for more information.
16. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 can improve performance by filtering power supply line noise.
17. The difference between t_PLH and t_PHL between any two devices under the same test condition. (See IPM Dead Time and Propagation Delay
Specifications section.)
18. Common mode transient immunity in a Logic High level is the maximum tolerable dV_CM/dt of the common mode pulse, V_CM, to assure that
the output will remain in a Logic High state (i.e., V_O > 3.0 V).
19. Common mode transient immunity in a Logic Low level is the maximum tolerable dV_CM/dt of the common mode pulse, V_CM, to assure that
the output will remain in a Logic Low state (i.e., V_O < 1.0 V).
20. Pulse Width Distortion (PWD) is defined as |t_PHL - t_PLH| for any given device.
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