HDSP-2107_10 Datasheet, PDF (13/16 Pages) AVAGO TECHNOLOGIES LIMITED – Eight Character 5 mm and 7 mm Smart Alphanumeric Displays

Control Word Register
Figure 6 shows how to access the Control Word Register.
This 8-bit register performs five functions: Brightness
control, Flash RAM control, Blinking, Self Test, and Clear.
Each function is independent of the others; however, all
bits are updated during each Control Word write cycle.
Brightness (Bits 0-2)
Bits 0-2 of the Control Word adjust the brightness of the
display. Bits 0-2 are interpreted as a three bit binary code
with code (000) corresponding to maximum brightness
and code (111) corresponding to a blanked display. In
addition to varying the display brightness, bits 0-2 also
vary the average value of I_DD. I_DD can be calculated at any
brightness level by multiplying the percent brightness
level by the value of I_DD at the 100% brightness level.
These values of I_DD are shown in Table 2.
Flash Function (Bit 3)
Bit 3 determines whether the flashing character attribute
is on or off. When bit 3 is a“1,” the output of the Flash RAM
is checked. If the content of a location in the Flash RAM is
a “1,” the associated digit will flash at approximately 2 Hz.
For an external clock, the blink rate can be calculated by
driving the clock frequency by 28,672. If the flash enable
bit of the Control Word is a “0,” the content of the Flash
RAM is ignored. To use this function with multiple display
systems, see the Display Reset section.
Blink Function (Bit 4)
Bit 4 of the Control Word is used to synchronize blinking
of all eight digits of the display. When this bit is a “1” all
eight digits of the display will blink at approximately 2
Hz. The actual rate is dependent on the clock frequency.
For an external clock, the blink rate can be calculated by
dividing the clock frequency by 28,672. This function will
override the Flash function when it is active. To use this
function with multiple display systems, see the Display
Reset section.
RST CE WR RD
0 0 UNDEFINED
1
0
0
1 WRITE TO DISPLAY
1 0 READ FROM DISPLAY
1 1 UNDEFINED
CONTROL SIGNALS
FL A₄ A₃ A₂ A₁ A₀
0XX
CHARACTER
ADDRESS
FLASH RAM ADDRESS
000 = LEFT MOST
111 = RIGHT MOST
D₇ D₆ D₅ D₄ D₃ D₂ D₁
XX X X XX X
FLASH RAM DATA FORMAT
0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE
D_{0 REMOVE FLASH AT}
0 SPECIFIED DIGIT LOCATION
1 STORE FLASH AT
SPECIFIED DIGIT LOCATION
Figure 5. Logic levels to access the flash RAM.
RST CE WR RD
0 0 UNDEFINED
1
0
0
1 WRITE TO DISPLAY
1 0 READ FROM DISPLAY
1 1 UNDEFINED
CONTROL SIGNALS
FL A₄ A₃ A₂ A₁ A₀
11 0 XX X
CONTROL WORD ADDRESS
D₇ D₆ D₅ D₄ D₃ D₂ D₁ D₀
C S S BL F B B B
000
001
010
011
100
101
110
111
0 DISABLE FLASH
1 ENABLE FLASH
100%
80%
53%
40%
27%
20%
BRIGHTNESS
CONTROL
LEVELS
13%
0%
0 DISABLE BLINKING
1 ENABLE BLINKING
0 X NORMAL OPERATION; X IS IGNORED
1 X START SELF TEST; RESULT GIVEN IN X
X = 0 FAILED X = 1 PASSED
0 NORMAL OPERATION
1 CLEAR FLASH AND CHARACTER RAMS
CONTROL WORD DATA FORMAT
0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE
Figure 6. Logic levels to access the control word register
Table 2. Current Requirements at Different Brightness Levels V_DD = 5.0 V
%
Current at 25°C
Symbol
D₂
D₁
D₀
Brightness
Typ.
Units
I_DD (V)
0
0
0
100
200
mA
0
0
1
80
160
mA
0
1
0
53
106
mA
0
1
1
40
80
mA
1
0
0
27
54
mA
1
0
1
20
40
mA
1
1
0
13
26
mA
13