HCPL-0630-000E Datasheet, PDF (13/21 Pages) AVAGO TECHNOLOGIES LIMITED – High CMR, High Speed TTL Compatible Optocouplers

Package Characteristics
All Typicals at T_A = 25 °C.
Parameter
Sym.  Package
Min. Typ. Max. Units    Test Conditions
Fig. Note
Input-Output
I_I-O* Single 8-Pin DIP
1
µA 45% RH, t = 5 s,
Insulation Single SO-8 V_I-O = 3 kV dc, T_A = 25 °C
Input-Output
V_ISO
Momentary With-
stand Voltage**
8-Pin DIP, SO-8
Widebody
OPT 020†
3750 V rms
5000
5000
RH ≤ 50%, t = 1 min,
T_A = 25 °C
20, 21
20, 21
20, 22
Input-Output
R_I-O
8-Pin DIP, SO-8
10¹² Ω
V_I-O = 500 V_dc
Resistance
Widebody
10¹² 10¹³ T_A = 25 °C

10¹¹ T_A = 100 °C
1, 20,
23
Input-Output
C_I-O
8-Pin DIP, SO-8
0.6
pF f = 1 MHz, T_A = 25 °C 1, 20,
Capacitance Widebody 0.5 0.6 23
Input-Input
I_I-I
Dual Channel 0.005 µA RH ≤ 45%, t = 5 s,
24
Insulation V_I-I = 500 V
Leakage Current
Resistance
(Input-Input)
R_I-I
Dual Channel
10¹¹ Ω 24
Capacitance
C_I-I
Dual 8-Pin DIP
0.03
(Input-Input) Dual SO-8 0.25
pF f = 1 MHz
24
*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to 70 °C. Avago specifies -40 °C to 85 °C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous volt-
age rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment
level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
†For 6N137, HCPL-2601/2611/2630/2631/4661 only.
Notes:
  1. Each channel.
  2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
  3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
  4. Derate linearly above 80 °C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
  5. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
  6. The JEDEC registration for the 6N137 specifies a maximum I_OH of 250 µA. Avago guarantees a maximum I_OH of 100 µA.
  7. The JEDEC registration for the 6N137 specifies a maximum I_CCH of 15 mA. Avago guarantees a maximum I_CCH of 10 mA.
  8. The JEDEC registration for the 6N137 specifies a maximum I_CCL of 18 mA. Avago guarantees a maximum I_CCL of 13 mA.
  9. The JEDEC registration for the 6N137 specifies a maximum I_EL of –2.0 mA. Avago guarantees a maximum I_EL of -1.6 mA.
10. The t_PLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The t_PHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. t_PSK is equal to the worst case difference in t_PHL and/or t_PLH that will be seen between units at any given temperature and specified test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The t_ELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The t_EHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CM_H is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., V_O > 2.0 V).
17. CM_L is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., V_O < 0.8 V).
18. For sinusoidal voltages, (|dV_CM | / dt)_max = πf_CMV_CM(p-p).
19. No external pull up is required for a high logic state on the enable input. If the V_E pin is not used, tying V_E to V_CC will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V_rms for one second (leakage detection
current limit, I_I-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-5 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, I_I-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-5 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only
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