U6815BM_09 Datasheet, PDF (9/14 Pages) ATMEL Corporation – Dual Hex DMOS Output Driver with Serial Input Control

U6815BM
12. Electrical Characteristics (Continued)
7.5V < V_VS < 40V; 4.5V < V_VCC < 5.5V; INH = High; –40°C < Tj < 150°C; unless otherwise specified, all values refer to GND pins.
Parameters
Test Conditions/Pins
Symbol
Min.
Typ.
Max. Unit
Ratio thermal shutdown, off/thermal
prewarning, set
Ratio thermal shutdown, on/thermal
prewarning, reset
Output Specification (LS1 to LS6, HS1 to HS6), 7.5V < V_VS < V_OV
On resistance, low
I_Out = 600 mA,
Pins 1, 4, 11, 14, 16 and 27
T_{j switch off/}
T_{jPW set}
T_{j switch on/}
T_{jPW reset}
1.05
1.05
1.17
1.2
R_{DS On L}
1.5
Ω
On resistance, high
I_Out = –600 mA,
Pins 2, 3, 12, 13, 15 and 28
R_{DS On H}
2.0
Ω
Output clamping voltage
I_LS1–6 = 50 mA,
Pins 1, 4, 11, 14, 16, 27
V_LS1–6
40
60
V
Output leakage current
Inductive shutdown energy⁽¹⁾
V_LS1–6 = 40V, all output stages off,
Pins 1, 4, 11, 14, 16 and 27
V_HS1–6 = 0V, all output stages off,
Pins 2, 3, 12, 13, 15 and 28
Pins 1-4, 11-16, 27 and 28
Output voltage edge steepness
Pins 1-4, 11-16, 27 and 28
Overcurrent limitation and shutdown
threshold
Overcurrent shutdown delay time
Open-load detection current
Pins 1, 4, 11, 14, 16 and 27
Pins 2, 3, 12, 13,15 and 28
Input register, bit 14 (SCT) = high
Input register, bit 14 (SCT) = low
Input register, bit 13 (OLD) = low,
output off, pins 1, 4, 11, 14, 16, 27
Input register, bit 13 (OLD) = low,
output off, pins 2, 3, 12, 13, 15, 28
I_LS1–6
I_HS1–6
W_outx
dV_LS1–6/dt
dV_HS1–6/dt
I_LS1–6
I_HS1–6
t_dSd
t_dSd
I_LS1–6
I_HS1–6
–10
50
650
–1250
70
8.75
60
–150
200
950
–950
100
10
µA
15
400
1250
–650
140
17.5
200
µA
mJ
mV/µ
s
mA
mA
ms
ms
µA
–30
µA
Open-load detection current ratio
I_LS1–6/
I_HS1–6
1.2
Open-load detection threshold
Input register, bit 13 (OLD) = low,
output off, pins 1, 4, 11, 14, 16, 27
V_LS1–6
0.6
Input register, bit 13 (OLD) = low,
output off, pins 2, 3, 12, 13, 15, 28
V_VS–
V_HS1–6
0.6
Output switch on delay ⁽²⁾
R_Load = 1 kΩ
t_don
R_Load = 1 kΩ
t_doff
Inhibit Input
4
V
4
V
0.5
ms
1
ms
Input voltage low level threshold
Pin 17
Input voltage high level threshold
Pin 17
Hysteresis of input voltage
Pin 17
Pull-down current
V_INH = V_VCC, pin 17
Notes: 1. Only valid for version U6815BM-N.
V_IL
0.3 ×
V_VCC
V_IH
ΔV_I
100
I_PD
10
V
0.7×
V_VCC
V
700
mV
80
µA
2. Delay time between rising edge of CS after data transmission and switch-on output stages to 90% of final level.
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4545D–BCD–04/09