AT24C16C_14 Datasheet, PDF (9/23 Pages) ATMEL Corporation – IC-Compatible, (2-Wire) Serial EEPROM

7. Device Addressing
Standard EEPROM Access: The 16K EEPROM device requires an 8-bit device address word following a Start
Condition to enable the chip for a Read or Write operation. The device address word consists of a mandatory
“1010” (Ah) sequence for the first four Most Significant Bits (MSB) as shown in Figure 10. on page 12. This is common
to all the EEPROM devices.
The next three bits used for memory page addressing are the most significant bits of the data word address which
follows.
The eighth bit of the device address is the Read/Write operation select bit. A Read operation is initiated if this bit is high
and a Write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the chip will return to
a standby state.
Figure 7-1. Device Address
Density
16K
Access Area
EEPROM
Bit 7
1
MSB
Bit 6
0
Bit 5
1
Bit 4
0
Bit 3
P2
Bit 2
P1
Bit 1
P0
Bit 0
R/W
LSB
8. Write Operations
Byte Write: A Write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first
8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such
as a microcontroller, must terminate the Write sequence with a Stop Condition. At this time the EEPROM enters an
internally timed write cycle, t_WR, to the nonvolatile memory. All inputs are disabled during this write cycle and the
EEPROM will not respond until the Write is complete (see Figure 8-1).
Figure 8-1. Byte Write
S
W
T
R
A
I
R ^Device
T
T Address
E Word Address
S
T
O
Data
P
SDA Line
M
RA
A
A
S
/C
C
C
B
WK
K
K
Atmel AT24C16C [DATASHEET]
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Atmel-8719B-SEEPROM-AT24C16C-Datasheet_042013