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TH7841A Datasheet, PDF (8/12 Pages) ATMEL Corporation – Linear CCD Image Sensor (2048 Pixels)
Table 6. Selection of Operating Modes
Option
Implementation
Note
No Sampling
ΦECHA (3) and ΦECHB (25) Connected to VDD
SΦECHA (4) and SΦECHB (24) Unconnected
(1)
VINH (16) Connected to VDD
Sampling By External Clocks
Sampling Clocks Connected to ΦECHA - ΦECHB
SΦECHA and SΦECHB Unconnected
VINH (16) Connected to VDD
See Figure 4 for sampling
clock timing (1)
Reset Control By External Clocks
Ext. ΦRA on ΦRA (5) Input
Ext. ΦRB on ΦRB (21) Input
See Figure 4 for
reset clock timing
Note: 1. Drain supply current IDD decreases from 10 mA to 8 mA typically when internal sampling clock is disabled (VINH = VDD =
15V).
Table 7. External ΦRA, ΦRB, ΦECHA, ΦECHB Clocks Characteristics
Values
Parameter
Symbol
Logic
Min
Typ
Max
Unit
External Reset Clock
ΦRA, ΦRB,
High
12
13
14
V
Sampling Clock
ΦECHA, ΦECHB
Low
0.0
0.4
0.6
V
Reset And Sampling Clock
Capacitance
CΦRA
CΦRB
CΦECHA
CΦECHB
10
15
pF
Insertion of a serial resistor (typically 100Ω) at the driver output avoids spurious negative transients.
8 TH7841A
1998A–IMAGE–05/02