ATR0625P Datasheet, PDF (8/27 Pages) ATMEL Corporation – GPS Baseband Processor SuperSense

Table 3-2. ATR0625P Signal Description (Continued)
Module
Name
Function
Type Active Level Comment
TMS
Test Mode Select
Input
–
Internal pull-up resistor
TDI
Test Data In
Input
–
Internal pull-up resistor
JTAG/ICE
TDO
TCK
Test Data Out
Test Clock
Output
Input
–
–
Internal pull-up resistor
NTRST
Test Reset Input
Input
Low Internal pull-down resistor
DBG_EN
Debug Enable
Input
High Internal pull-down resistor
CLOCK
CLK23
Clock Input
Input
–
Interface to ATR0601,
Schmitt trigger input
RESET
NRESET
Reset Input
I/O
Low
Open drain with internal pull-up
resistor
VDD18
Power
–
Core voltage 1.8V
POWER
VDDIO
VDD_USB
Power
Power
–
Variable IO voltage 1.65V to 3.6V
–
USB voltage 0 to 2.0V or
3.0V to 3.6V⁽¹⁾
GND
Power
–
Ground
LDOBAT_IN
Power
–
2.3V to 3.6V
LDOBAT
VBAT
Power
–
1.5V to 3.6V
VBAT18
Out
–
1.8V backup voltage
LDO_IN
LDO In
Power
–
2.3V to 3.6V
LDO18
LDO_OUT
LDO Out
Power
–
1.8V core voltage, max. 80 mA
LDO_EN
LDO Enable
Input
–
Note: 1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.
8 ATR0625P
4925G–GPS–06/08