ATR0625P Datasheet, PDF (7/27 Pages) ATMEL Corporation – GPS Baseband Processor SuperSense

ATR0625P
3.2 Signal Description
Table 3-2. ATR0625P Signal Description
Module
Name
Function
Type Active Level Comment
EBI
BOOT_MODE Boot Mode Input
Input
–
PIO-controlled after reset,
internal pull-down resistor
TXD1 to TXD2 Transmit Data Output
Output
–
PIO-controlled after reset
USART
RXD1 to RXD2 Receive Data Input
Input
–
PIO-controlled after reset
SCK1 to SCK2 External Synchronous Serial Clock I/O
–
PIO-controlled after reset
USB
USB_DP
USB_DM
USB Data (D+)
USB Data (D-)
I/O
–
I/O
–
APMC
RF_ON
Output
–
Interface to ATR0601
AIC
EXTINT0-1
External Interrupt Request
Input
High/
Low/
Edge
PIO-controlled after reset
AGC
AGCOUT0-1 Automatic Gain Control
Output
–
Interface to ATR0601
PIO-controlled after reset
NSLEEP
Sleep Output
Output
Low Interface to ATR0601
RTC
NSHDN
XT_IN
Shutdown Output
Oscillator Input
Output
Input
Low
Connect to pin LDO_EN
–
RTC oscillator
XT_OUT
Oscillator Output
Output
–
RTC oscillator
SCK
SPI Clock
I/O
–
PIO-controlled after reset
MOSI
Master Out Slave In
I/O
–
PIO-controlled after reset
SPI
MISO
Master In Slave Out
I/O
–
PIO-controlled after reset
NSS/NPCS0 Slave Select
I/O
Low
PIO-controlled after reset
NPCS1 to NPCS3 Slave Select
Output
Low PIO-controlled after reset
PIO
P0 to P31
Programmable I/O Port
I/O
–
Input after reset
SIGHI0
Digital IF
Input
–
Interface to ATR0601
SIGLO0
Digital IF
Input
–
Interface to ATR0601
GPS
SIGHI1
Digital IF
Input
–
PIO-controlled after reset
SIGLO1
Digital IF
Input
–
PIO-controlled after reset
TIMEPULSE GPS synchronized time pulse
Output
–
PIO-controlled after reset
GPSMODE0-12 GPS Mode
Input
–
PIO-controlled after reset
STATUSLED Status LED
Output
–
PIO-controlled after reset
CONFIG
NEEPROM
ANTON
Enable EEPROM Support
Active antenna power on Output
Input
Output
Low PIO-controlled after reset
–
PIO-controlled after reset
NANTSHORT
Active antenna short circuit
detection Input
Input
Low
PIO-controlled after reset
NAADET0-1 Active antenna detection Input
Input
Low PIO-controlled after reset
Note: 1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.
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4925G–GPS–06/08