AT24C128C-SSHM-T Datasheet, PDF (8/22 Pages) ATMEL Corporation – I2C-Compatible (2-Wire) Serial EEPROM 128-Kbit (16,384 x 8)

Figure 6-5. Write Cycle Timing
SCL
SDA
8^th Bit
ACK
WORD_N
Stop
Condition
(1)
t_WR
Start
Condition
Note: 1. The write cycle time t_WR is the time from a valid stop condition of a write sequence to the end of
the internal clear/write cycle.
Figure 6-6. Output Acknowledge
SCL
1
Data In
8
9
Data Out
Start
Acknowledge
Atmel AT24C128C [DATASHEET]
8
8734B–SEEPR–9/2012