AT24C128C-SSHM-T Datasheet, PDF (11/22 Pages) ATMEL Corporation – I2C-Compatible (2-Wire) Serial EEPROM 128-Kbit (16,384 x 8)

9. Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations:
 Current Address Read
 Random Address Read
 Sequential Read
Current Address Read: The internal data word address counter maintains the last address accessed during the last
read or write operation, incremented by one. This address stays valid between operations as long as the chip power is
maintained. The address roll-over during read is from the last byte of the last memory page, to the first byte of the first
page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an input zero but does
generate a following stop condition (See Figure 9-1).
Figure 9-1. Current Address Read
S
T
A
R
Device
T Address
SDA Line
M
S
B
R
E
A
D
RA
/C
WK
Data
S
T
O
P
N
O
A
C
K
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must
generate another start condition. The microcontroller now initiates a Current Address Read by sending a device address
with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word.
The microcontroller does not respond with a zero but does generate a following stop condition. (See Figure 9-2)
Figure 9-2. Random Read
S
W
T
R
A
I
R
Device
T
T Address
E
First Word
Address
Second Word
Address
S
T
R
A
E
R
Device
A
T
Address
D
SDA LINE
M
RA
A
LA
S
/C
C
SC
B
WK
K
BK
RA
/C
WK
Note: * = Don’t care bit
Dummy Write
Data (n)
S
T
O
P
N
O
A
C
K
Atmel AT24C128C [DATASHEET] 11
8734B–SEEPR–9/2012